SH7615 Datasheet, PDF (93/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Addressing
Mode
Instruction
Format Effective Addresses Calculation
Equation
Indirect register @(disp:4,
addressing Rn)
with
displacement
The effective address is Rn plus a 4-bit
Byte: Rn + disp
displacement (disp). The value of disp is zero- _{Word: Rn + disp ×}
extended, and remains the same for a byte
2
operation, is doubled for a word operation, and is
quadrupled for a longword operation
Longword: Rn +
disp × 4
Rn
disp
+
(zero-extended)
×
Rn
+ disp × 1/2/4
1/2/4
Indirect indexed @(R0, Rn) The effective address is the Rn value plus R0
register
addressing
Rn
+
Rn + R0
Rn + R0
R0
Indirect GBR @(disp:8,
addressing with GBR)
displacement
The effective address is the GBR value plus an
8-bit displacement (disp). The value of disp is
zero-extended, and remains the same for a byte
operation, is doubled for a word operation, and
is quadrupled for a longword operation
GBR
Byte: GBR + disp
Word: GBR + disp
×2
Longword: GBR +
disp × 4
disp
+
(zero-extended)
×
GBR
+ disp × 1/2/4
1/2/4
Rev. 2.00, 03/05, page 55 of 884