SH7615 Datasheet, PDF (462/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

10.2.4 Transmit Descriptor List Address Register (TDLAR)
TDLAR specifies the start address of the transmit descriptor list. Descriptors have a boundary
configuration in accordance with the descriptor length indicated by the DL bit in EDMR.
Bit: 31
30
29
28
27
26
25
24
TDLA31 TDLA30 TDLA29 TDLA28 TDLA27 TDLA26 TDLA25 TDLA24
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 23
22
21
20
19
18
17
16
TDLA23 TDLA22 TDLA21 TDLA20 TDLA19 TDLA18 TDLA17 TDLA16
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15
14
13
12
11
10
9
TDLA15 TDLA14 TDLA13 TDLA12 TDLA11 TDLA10 TDLA9
Initial value: 0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W
8
TDLA8
0
R/W
Bit:
Initial value:
R/W:
7
TDLA7
0
R/W
6
TDLA6
0
R/W
5
TDLA5
0
R/W
4
TDLA4
0
R/W
3
TDLA3
0
R/W
2
TDLA2
0
R/W
1
TDLA1
0
R/W
0
TDLA0
0
R/W
Bits 31 to 0—Transmit Descriptor Start Address 31 to 0 (TDLA31 to TDLA0): These bits should
only be written with 0.
Notes: The lower bits are set as follows according to the specified descriptor length.
16-byte boundary: TDLA[3:0] = 0000
32-byte boundary: TDLA[4:0] = 00000
64-byte boundary: TDLA[5:0] = 000000
This register must not be written to during transmission. Modifications to this register
should only be made while transmission is disabled.
Rev. 2.00, 03/05, page 424 of 884