SH7615 Datasheet, PDF (300/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

7.2.2 Bus Control Register 2 (BCR2)
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
— A4SZ1 A4SZ0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R/W R/W
Bit: 7
6
5
4
3
2
1
0
A3SZ1 A3SZ0 A2SZ1 A2SZ0 A1SZ1 A1SZ0 —
—
Initial value: 1
1
1
1
1
1
0
0
R/W: R/W R/W R/W R/W R/W R/W
R
R
Initialize BCR2 after a power-on reset and do not write to it thereafter. When writing to it, write
the same values as those the bits are initialized to. Do not access any space other than CS0 until
the register initialization ends.
The CS0 space bus size specification is set with pins MD4 and MD3. See section 3.3, CS0 Space
Bus Width of the CS0 Area, for details.
Bits 15 to 10—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 9 and 8—Bus Size Specification for Area 4 (CS4) (A4SZ1, A4SZ0)
Bit 9: A4SZ1
0
1
Bit 8: A4SZ0
0
1
0
1
Description
Longword (32-bit) size
Byte (8-bit) size
Word (16-bit) size
Longword (32-bit) size
(Initial value)
Bits 7 and 6—Bus Size Specification for Area 3 (CS3) (A3SZ1, A3SZ0). Effective only when
ordinary space is set.
Bit 7: A3SZ1
0
1
Bit 6: A3SZ0
0
1
0
1
Description
Reserved (do not set)
Byte (8-bit) size
Word (16-bit) size
Longword (32-bit) size
(Initial value)
Rev. 2.00, 03/05, page 262 of 884