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SH7615 Datasheet, PDF (263/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7600 Series
BDRD Configuration
XYED = 0
XYED = 1
Data
X data
(when XYSD = 0)
Y data
(when XYSD = 1)
Upper 16 Bits
(BDD31 to BDD16)
Upper 16 bits of data bus
X data
(XDB15 to XDB0)
—
Lower 16 Bits
(BDD15 to BDD0)
Lower 16 bits of data bus
—
Y data
(YDB15 to YDB0)
6.2.16 Break Data Mask Register D (BDMRD)
BDMRDH
Bit: 15
14
13
12
11
10
9
8
BDMD31 BDMD30 BDMD29 BDMD28 BDMD27 BDMD26 BDMD25 BDMD24
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
BDMD23 BDMD22 BDMD21 BDMD20 BDMD19 BDMD18 BDMD17 BDMD16
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
BDMRDL
Bit: 15
14
13
12
11
10
9
8
BDMD15 BDMD14 BDMD13 BDMD12 BDMD11 BDMD10 BDMD9 BDMD8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
BDMD7 BDMD6 BDMD5 BDMD4 BDMD3 BDMD2 BDMD1 BDMD0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Break data mask register D (BDMRD) consists of two 16-bit readable/writable registers: break
data mask register DH (BDMRDH) and break data mask register DL (BDMRDL). BDMRDH
specifies which bits of the break data set in BDRDH are to be masked, and BDMRDL specifies
which bits of the break data set in BDRDL are to be masked. Operation also depends on bits
Rev. 2.00, 03/05, page 225 of 884