SH7615 Datasheet, PDF (51/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

1.2 Block Diagram
Cache
address
array/data
array
Cache
controller
Direct
memory access
controller
Ethernet
controller
Ethernet
controller
direct memory
access
controller
CPU
Interrupt
controller
DSP
X-RAM
Y-RAM
User break
controller
Bus state
controller
High-
performance
user debugging
interface
Serial
I/O
Serial
communication
interface
with FIFO
Timer
pulse unit
Free-running
timer
Watchdog
timer
Clock pulse
generator
System
controller
I/O ports
External bus
interface
Figure 1.1 Block Diagram of SH7615
Rev. 2.00, 03/05, page 13 of 884