SH7615 Datasheet, PDF (593/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Writing to WTCNT
Address:
H'FFFFFE80
15
H'5A
87
0
Write data
Writing to WTCSR
Address:
H'FFFFFE80
15
H'A5
87
0
Write data
Figure 13.2 Writing to WTCNT and WTCSR
Writing to RSTCSR: RSTCSR must be written by a word access to address H'FFFFFE82. It
cannot be written by byte or longword transfer instructions. Procedures for writing 0 in WOVF
(bit 7) and for writing to RSTE (bit 6) and RSTS (bit 5) are different, as shown in figure 13.3. To
write 0 in the WOVF bit, the write data must be H'A5 in the upper byte and H'00 in the lower byte.
This clears the WOVF bit to 0. The RSTE and RSTS bits are not affected. To write to the RSTE
and RSTS bits, the upper byte must be H'5A and the lower byte must be the write data. The values
of bits 6 and 5 of the lower byte are transferred to the RSTE and RSTS bits, respectively. The
WOVF bit is not affected.
Writing 0 to the WOVF bit
Address:
H'FFFFFE82
15
87
0
H'A5
H'00
Writing to the RSTE and RSTS bits
Address:
H'FFFFFE82
15
H'5A
87
0
Write data
Figure 13.3 Writing to RSTCSR
Reading from WTCNT, WTCSR, and RSTCSR: WTCNT, WTCSR, and RSTCSR are read
like other registers. Use byte transfer instructions. The read addresses are H'FFFFFE80 for
WTCSR, H'FFFFFE81 for WTCNT, and H'FFFFFE83 for RSTCSR.
Rev. 2.00, 03/05, page 555 of 884