SH7615 Datasheet, PDF (126/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Table 2.26 Added CPU Instructions
Instruction
LDC
Rm,MOD
LDC
Rm,RE
LDC
Rm,RS
LDC.L @Rm+,MOD
LDC.L @Rm+,RE
LDC.L @Rm+,RS
STC
MOD,Rn
STC
RE,Rn
STC
RS,Rn
STC.L MOD,@-Rn
STC.L RE,@-Rn
STC.L RS,@-Rn
LDS
Rm,DSR
LDS.L @Rm+,DSR
LDS
Rm,A0
LDS.L @Rm+,A0
LDS
Rm,X0
LDS.L @Rm+,X0
LDS
Rm,X1
LDS.L @Rm+,X1
LDS
Rm,Y0
LDS.L @Rm+,Y0
LDS
Rm,Y1
LDS.L @Rm+,Y1
STS
DSR,Rn
STS.L DSR,@-Rn
STS
A0,Rn
STS.L A0,@-Rn
STS
X0,Rn
STS.L X0,@-Rn
STS
X1,Rn
Code
0100mmmm01011110
0100mmmm01111110
0100mmmm01101110
0100mmmm01010111
0100mmmm01110111
0100mmmm01100111
0000nnnn01010010
0000nnnn01110010
0000nnnn01100010
0100nnnn01010011
0100nnnn01110011
0100nnnn01100011
0100mmmm01101010
0100mmmm01100110
0100mmmm01111010
0100mmmm01110110
0100mmmm10001010
0100mmmm10000110
0100mmmm10011010
0100mmmm10010110
0100mmmm10101010
0100mmmm10100110
0100mmmm10111010
0100mmmm10110110
0000nnnn01101010
0100nnnn01100010
0000nnnn01111010
0100nnnn01110010
0000nnnn10001010
0100nnnn10000010
0000nnnn10011010
Operation
Rm→MOD
Rm→RE
Rm→RS
(Rm)→MOD,Rm+4→Rm
(Rm)→RE,Rm+4→Rm
(Rm)→RS,Rm+4→Rm
MOD→Rn
RE→Rn
RS→Rn
Rn–4→Rn,MOD→(Rn)
Rn–4→Rn,RE→(Rn)
Rn–4→Rn,RS→(Rn)
Rm→DSR
(Rm)→DSR,Rm+4→Rm
Rm→A0
(Rm)→A0,Rm+4→Rm
Rm→X0
(Rm)→X0,Rm+4→Rm
Rm→X1
(Rm)→X1,Rm+4→Rm
Rm→Y0
(Rm)→Y0,Rm+4→Rm
Rm→Y1
(Rm)→Y1,Rm+4→Rm
DSR→Rn
Rn–4→Rn,DSR→(Rn)
A0→Rn
Rn–4→Rn,A0→(Rn)
X0→Rn
Rn–4→Rn,X0→(Rn)
X1→Rn
Cycles
1
1
1
3
3
3
1
1
1
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Rev. 2.00, 03/05, page 88 of 884