SH7615 Datasheet, PDF(700/925 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7600 Series

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SH7615 Datasheet, PDF (700/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7600 Series

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16.1.2 Block Diagram

Figure 16.1 shows a block diagram of the TPU.

Clock input

Internal clock: PÏ/1

PÏ/4

PÏ/16

PÏ/64

PÏ/256

PÏ/1024

External clock: TCLKA

TCLKB

TCLKC

TCLKD

Channel 0:

Channel 1:

Channel 2:

I/O pins

TIOCA0

TIOCB0

TIOCC0

TIOCD0

TIOCA1

TIOCB1

TIOCA2

TIOCB2

TCR:

TMDR:

TIOR:

TIER:

TSR:

TCNT:

TGR:

TSTR:

TSYR:

Timer Control Register

Timer Mode Register

Timer I/O Control Register

Timer Interrupt Enable Register

Timer Status Register

Timer Counter

Timer General Register

Timer Start Register

Timer Synchro Register

Figure 16.1 TPU Block Diagram

Internal data bus

Interrupt request signals

Channel 0: TGI0A

TGI0B

TGI0C

TGI0D

TCI0V

Channel 1: TGI1A

TGI1B

TCI1V

TCI1U

Channel 2: TGI2A

TGI2B

TCI2V

TCI2U

Rev. 2.00, 03/05, page 662 of 884

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