SH7615 Datasheet, PDF (211/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

5.3.16 Vector Number Setting Register J (VCRJ)
Vector number setting register J (VCRJ) is a 16-bit read/write register that sets the 16-bit timer
pulse unit 2 (TPU2) TGR2A and TGR2B input capture/compare match interrupt vector numbers
(0 to 127).
VCRJ is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bit: 15
14
13
12
11
10
9
8
— TG2AV6 TG2AV5 TG2AV4 TG2AV3 TG2AV2 TG2AV1 TG2AV0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
— TG2BV6 TG2BV5 TG2BV4 TG2BV3 TG2BV2 TG2BV1 TG2BV0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—16-Bit Timer pulse unit 2 (TPU2) TGR2A Input Capture/Compare Match Interrupt
Vector Number 6 to 0 (TG2AV6 to TG2AV0): These bits set the vector number for the 16-bit
timer pulse unit 2 (TPU2) TGR2A input capture/compare match interrupt. There are seven bits, so
the value can be set between 0 and 127.
Bits 6 to 0—16-Bit Timer pulse unit 2 (TPU2) TGR2B Input Capture/Compare Match Interrupt
Vector Number 6 to 0 (TG2BV6 to TG2BV0): These bits set the vector number for the 16-bit
timer pulse unit 2 (TPU2) TGR2B input capture/compare match interrupt. There are seven bits, so
the value can be set between 0 and 127.
Rev. 2.00, 03/05, page 173 of 884