SH7615 Datasheet, PDF (474/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Bit 3—Receive Too-Long Frame Interrupt Permission (RTLFIP): Enables the receive too-long
frame interrupt.
Bit 3: RTLFIP
0
1
Description
Receive too-long frame interrupt is disabled
Receive too-long frame interrupt is enabled
(Initial value)
Bit 2—Receive Too-Short Frame Interrupt Permission (RTSFIP): Enables the receive too-short
frame interrupt.
Bit 2: RTSFIP
0
1
Description
Receive too-short frame interrupt is disabled
Receive too-short frame interrupt is enabled
(Initial value)
Bit 1—PHY-LSI Receive Error Interrupt Permission (PREIP): Enables the PHY-LSI receive error
interrupt.
Bit 1: PREIP
0
1
Description
PHY-LSI receive error interrupt is disabled
PHY-LSI receive error interrupt is enabled
(Initial value)
Bit 0—CRC Error on Received Frame Interrupt Permission (PREIP): Enables the CRC error on
received frame interrupt.
Bit 0: CERFIP
0
1
Description
CRC error on received frame interrupt is disabled
CRC error on received frame interrupt is enabled
(Initial value)
Rev. 2.00, 03/05, page 436 of 884