SH7615 Datasheet, PDF (734/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Example of Synchronous Operation: Figure 16.15 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGR0B compare match has been set as the channel 0 counter clearing source, and synchronous
clearing has been set for the channel 1 and 2 counter clearing source.
Three-phase PWM waveforms are output from pins TIOC0A, TIOC1A, and TIOC2A. At this
time, synchronous presetting, and synchronous clearing by TGR0B compare match, is performed
for channel 0 to 2 TCNT counters, and the data set in TGR0B is used as the PWM cycle.
For details of PWM modes, see section 16.4.5, PWM Modes.
TCNT0 to TCNT2 values
TGR0B
TGR1B
TGR0A
TGR2B
TGR1A
TGR2A
H'0000
Synchronous clearing by TGR0B compare match
TIOC0A
TIOC1A
TIOC2A
Figure 16.15 Example of Synchronous Operation
Time
Rev. 2.00, 03/05, page 696 of 884