SH7615 Datasheet, PDF (522/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Table 11.6 Selecting On-Chip Peripheral Module Request Mode with the AR and RS Bits
DMA
DMA Transfer Transfer
Transfer^*
Request
Request Transfer^* Destina- Bus
AR RS4 RS3 RS2 RS1 RS0 Source
Signal Source tion
Mode
0 0 0 1 0 1 SCIF channel 1 RXI
receiver
SCFRDR1 Any
Cycle-
steal
1 0 SCIF channel 1 TXI
Any
transmitter
SCFTDR1 Cycle-
steal
1 0 0 1 SCIF channel 2 RXI
receiver
SCFRDR2 Any
Cycle-
steal
1 0 SCIF channel 2 TXI
Any
transmitter
SCFTDR2 Cycle-
steal
1 0 0 TPU channel TGI0A Any
Any
Cycle-
0A
(excluding (excluding steal
on-chip on-chip
RAM)
RAM)
1 TPU channel TGI0B Any
Any
Cycle-
0B
(excluding (excluding steal
on-chip on-chip
RAM)
RAM)
1 0 TPU channel TGI0C Any
Any
Cycle-
0C
(excluding (excluding steal
on-chip on-chip
RAM)
RAM)
1 TPU channel TGI0D Any
Any
Cycle-
0D
(excluding (excluding steal
on-chip on-chip
RAM)
RAM)
1 0 0 0 1 SIO channel 0 RDFI
receiver
SIRDR0 Any
Cycle-
steal
1 0 SIO channel 0 TDEI
Any
transmitter
SITDR0
Cycle-
steal
1 0 1 SIO channel 1 RDFI
receiver
SIRDR1 Any
Cycle-
steal
1 0 SIO channel 1 TDEI
Any
transmitter
SITDR1
Cycle-
steal
1 0 0 1 SIO channel 2 RDFI
receiver
SIRDR2 Any
Cycle-
steal
1 0 SIO channel 2 TDEI
Any
transmitter
SITDR2
Cycle-
steal
Note: * Do not perform transfers between on-chip peripheral modules.
DREQ
Setting
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Edge,
active-low
Rev. 2.00, 03/05, page 484 of 884