HC4GX15 Datasheet, PDF (86/668 Pages) Altera Corporation – HardCopy IV Device Handbook

7–20
Chapter 7: External Memory Interfaces in HardCopy IV Devices
Memory Interfaces Pin Support
Figure 7–13. DQS Pins in HardCopy IV GX I/O Banks
DQS26T
DQS14T
DQS13T
DQS1T
DLL1
PLL_T1 PLL_T2
DLL4
8A
8B
8C
7C
7B
7A
DQS1L
DQS26R
1A
6A
1C
DQS13L
PLL_L1
PLL_L2
DQS14L
2C
6C
DQS14R
PLL_R1
PLL_R2
DQS13R
5C
2A
5A
DQS26L
DQS1R
3A
3B
3C
4C
4B
4A
DLL2
PLL_B1 PLL_B2
DLL3
DQS1B
DQS13B
DQS14B
DQS26B
The DQ pin numbering is based on ×4 mode. In ×4 mode, there are up to eight
DQS/DQ groups per I/O bank. Each ×4 mode DQS/DQ group consists of a DQS pin,
a DQSn pin, and four DQ pins. In ×8/×9 mode, the I/O bank combines two adjacent
×4 DQS/DQ groups; one pair of DQS and DQSn/CQn pins can drive all the DQ and
parity pins in the new combined group that consists of up to 10 DQ pins (including
parity or DM and QVLD pins) and a pair of DQS and DQSn/CQn pins. Similarly, in
×16/×18 mode, the I/O bank combines four adjacent ×4 DQS/DQ groups to create a
group with a maximum of 19 DQ pins (including parity or DM and QVLD pins) and a
pair of DQS and DQSn/CQn pins. In ×32/×36 mode, the I/O bank combines eight
adjacent ×4 DQS/DQ groups together to create a group with a maximum of 37 DQ
pins (including parity or DM and QVLD pins) and a pair of DQS and DQSn/CQn
pins.
HardCopy IV modular I/O banks allow easy formation of the DQS/DQ groups. If all
the pins in the I/O banks are user I/O pins and are not used for R_UP/R_DN OCT
calibration or PLL clock output pins, you can divide the number of I/O pins in the
bank by six to get the maximum possible number of ×4 groups. You can then divide
that number by two, four, or eight to get the maximum possible number of ×8/×9,
×16/×18, or ×32/×36, respectively, as listed in Table 7–7. However, some of the pins
in the I/O bank may be used for other functions.
HardCopy IV Device Handbook, Volume 1
© January 2010 Altera Corporation