HC4GX15 Datasheet, PDF (595/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Design Examples: Dynamic Reconfiguration Controller (ALTGX_RECONFIG)
2–137
Step 4—Modify the ALTGX Instance for a SONET/SDH OC48 Configuration
1. To create a .mif for the SONET/SDH OC48 configuration, either modify the
existing ALTGX instance created for the GIGE configuration or create a new
instance for the SONET configuration. However, the first method is easier because
it does not require major RTL or schematic changes.
2. Open the existing ALTGX instance. Select the Which protocol you will be using?
option and set it to SONET/SDH. Set the sub protocol option to OC48. All the
other signals selected for GIGE mode do not need to be changed.
3. In the Reconfig screen, select the Channel Interface and alternate reference clock
options. In the protocol section, select GIGE. Select the same input clock
frequency selected for the GIGE instance in the General screen.
4. For the logical reference clock index option, choose the complement of what you
selected for the GIGE instance.
5. Complete the instantiation.
Step 5—Generate the .mif for the SONET/SDH OC48 Configuration
1. Before compiling the design, in the RTL or schematic, connect pll_inclk and
rx_cruclk to the clock source that provides the SONET/SDH OC48 clock.
Similarly, connect pll_inclk_alt and rx_cruclk_alt to the clock source that
provides the GIGE clock.
The Quartus II software generates the new .mif in the /reconfig_mif directory.
Step 6—Initialize Two Memory Elements with the .mif Contents and Write Logic to Select the
.mif and to Control the ALTGX_RECONFIG Instance
1. Assign the two .mifs to the ALTMEM_INIT megafunction in the MegaWizard
Plug-In Manager to initialize each of the RAM. This megafunction reads from an
internal ROM (inside the megafunction) or an external ROM (on-chip or off-chip),
and writes to the RAM after power up.
f
HardCopy IV GX ASIC does not support pre-loading or initializing
internal memory blocks with .mif when used as RAM. For more
information, refer to RAM Initializer (ALTMEM_INIT) Megafunction User
Guide.
Section II—Control the Logic for the Dynamic Reconfiguration Controller
The control logic block is required to perform the following functions:
■ Select the memory to configure a channel to the GIGE or SONET/SDH
configuration.
■ Control the reconfiguration mode (namely the PMA controls reconfiguration
mode or the Channel and CMU PLL reconfiguration mode).
■ Control the read and write signals to the ALTGX_RECONFIG instance based on
the busy and data valid signals.
© June 2009 Altera Corporation
HardCopy IV Device Handbook, Volume 3