HC4GX15 Datasheet, PDF (115/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 8: High-Speed Differential I/O Interfaces and DPA in HardCopy IV Devices
8–5
LVDS Channels
Table 8–3. LVDS Channels Supported in HardCopy IV GX Device Left and Right (Row) I/O Banks (Note 1), (2)
HardCopy IV GX Device
780-Pin FineLine 1152-Pin FineLine
BGA
BGA
HC4GX15LA
28Rx + 28Tx
—
HC4GX15L
—
—
HC4GX25L
—
44Rx + 44Tx
HC4GX25F
—
—
HC4GX35F
—
—
Notes to Table 8–3:
(1) The HardCopy IV GX device family does not offer a 1760-pin package.
(2) The LVDS channel count does not include dedicated clock input pins.
(3) This package supports PMA-only transceiver channels.
1152-Pin FineLine
BGA (3)
—
—
—
44Rx + 44Tx
44Rx + 44Tx
1517-Pin FineLine
BGA (3)
—
—
—
—
88Rx + 88Tx
Table 8–4 shows the LVDS channels supported in HardCopy IV GX device top and
bottom (column) I/O banks.
Table 8–4. LVDS Channels Supported in HardCopy IV GX Device Top and Bottom (Column) I/O Banks (Note 1), (2), (3)
HardCopy IV GX Device
780-Pin FineLine
BGA
1152-Pin FineLine 1152-Pin FineLine 1517-Pin FineLine
BGA
BGA (4)
BGA (4)
HC4GX15LA
64Rx + 64eTx
or
—
—
—
128eTx
HC4GX15L
64Rx + 64eTx
or
—
—
—
128eTx
HC4GX25L
72Rx + 72eTx
96Rx + 96eTx
or
or
—
—
144eTx
192eTx
HC4GX25F
96Rx + 96eTx
—
—
or
—
192eTx
HC4GX35F
96Rx + 96eTx
96Rx + 96eTx
—
—
or
or
192eTx
192eTx
Note to Table 8–4:
(1) The HardCopy IV GX device family does not offer a 1760-pin package.
(2) The LVDS channel count does not include dedicated clock input pins.
(3) Rx = true LVDS input buffers with OCT RD, Tx = true LVDS output buffers, and eTx = emulated LVDS output buffers (either LVDS_E_1R or
LVDS_E_3R).
(4) This package supports PMA-only transceiver channels.
If you have read about high-speed differential I/O interfaces and DPA in the
Stratix IV Device Handbook, refer to “Design Recommendations” on page 8–24 and
“Differences Between Stratix IV and HardCopy IV Devices” on page 8–25.
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 1