HC4GX15 Datasheet, PDF (355/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV GX Transceiver Architecture
1–91
Receiver Channel Datapath
Figure 1–68 shows the receiver byte reversal feature.
Figure 1–68. Receiver Byte Reversal Feature
MSByte ⁰¹
03
05
07
09
0B
Data to be
transmitted
LSByte ₀₀
02
04
06
08
0A
MSByte ⁰⁰
02
04
06
08
0A
Input data to
transmitter
LSByte ₀₁
03
05
07
09
0B
rx_revbyteordwa
MSByte ^xx
xx
LSByte _xx
xx
07 09 0B Word Aligner Output
with rx_revbyteordwa
asserted
06 08 0A
Deskew FIFO
Code groups received across four lanes in a XAUI link can be misaligned with respect
to one another because of skew in the physical medium or differences between the
independent clock recoveries per lane. The XAUI protocol allows a maximum skew of
40 UI (12.8 ns) as seen at the receiver of the four lanes.
XAUI protocol requires the physical layer device to implement a deskew circuitry to
align all four channels. To enable the deskew circuitry at the receiver to align the four
channels, the transmitter sends a /A/ (/K28.3/) code group simultaneously on all
four channels during inter-packet gap (IPG). The skew introduced in the physical
medium and the receiver channels can cause the /A/ code groups to be received
misaligned.
Deskew circuitry performs the deskew operation in XAUI functional mode. Deskew
circuitry consists of:
■ A 16-word deep deskew FIFO in each of the four channels
■ Control logic in the CMU0 channel of the transceiver block that controls the deskew
FIFO write and read operations in each channel
1 Deskew circuitry is only available in XAUI mode.
© June 2009 Altera Corporation
HardCopy IV Device Handbook Volume 3