HC4GX15 Datasheet, PDF (356/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–92
Chapter 1: HardCopy IV GX Transceiver Architecture
Receiver Channel Datapath
The deskew FIFO in each channel receives data from its word aligner. The deskew
operation begins only after link synchronization is achieved on all four channels as
indicated by a high level on the rx_syncstatus signal from the word aligner in
each channel. Until the first /A/ code group is received, the deskew FIFO read and
write pointers in each channel are not incremented. After the first /A/ code group is
received, the write pointer starts incrementing for each word received but the read
pointer is frozen. If the /A/ code group is received on each of the four channels
within 10 recovered clock cycles of each other, the read pointer for all four deskew
FIFOs is released simultaneously, aligning all four channels.
Figure 1–69 shows lane skew at the receiver input and how the deskew FIFO uses the
/A/ code group to align the channels.
Figure 1–69. Deskew FIFO—Lane Skew at the Receiver Input
Lane 0 K K R A K R R K K R K R
Lane 1 K K R A K R R K K R K R
Lane 2 K K R A K R R K K R K R
Lane 3 K K R A K R R K K R K R
Lane Skew at
Receiver Input
Lane 0 K K R A K R R K K R K R
Lanes are
Lane 1 K K R A K R R K K R K R Deskewed by
Lining up
Lane 2 K
KR
AK
R
R
K
K
R
K R _{the "Align"/A/,}
Code Groups
Lane 3 K K R A K R R K K R K R
After alignment of the first ||A|| column, if three additional aligned ||A||
columns are observed at the output of the deskew FIFOs of the four channels, the
rx_channelaligned signal is asserted high, indicating channel alignment is
acquired. After acquiring channel alignment, if four misaligned ||A|| columns are
seen at the output of the deskew FIFOs in all four channels with no aligned ||A||
columns in between, the rx_channelaligned signal is de-asserted low, indicating
loss of channel alignment.
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation