HC4GX15 Datasheet, PDF (654/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–24
Chapter 1: DC and Switching Characteristics of HardCopy IV Devices
Switching Characteristics
Table 1–26. HardCopy IV PLL Specifications—Preliminary (Part 1 of 2) (Note 1)
Symbol
Parameter
Min Typ
f_IN
f_INPFD
f_VCO
t_{EIND UTY}
f_OUT
f_{OUT_EXT}
t_OUTDUTY
t_FCOMP
Input clock frequency
Input frequency to the PFD
PLL VCO operating range
Input clock or external feedback clock input duty cycle
Output frequency for internal global or regional clock
Output frequency for external clock input (–3 speed grade)
Duty cycle for external clock output (when set to 50%)
External feedback clock compensation time
5
—
5
—
600 —
40
—
—
—
—
—
45
50
—
—
t_{CO NFIGP LL}
Time required to reconfigure PLL scan chain
—
—
t_CONFIGPHASE Time required or reconfigure phase shift
—
—
f_SCANCLK
t_LOCK
t_DLOCK
scanclk frequency
Time required to lock from end of device power
Time required to lock dynamically (after switchover or
reconfiguring any non-post-scale counters/delays)
—
—
—
—
—
—
PLL closed-loop low bandwidth
—
—
f_CLBW
PLL closed-loop medium bandwidth
PLL closed-loop high bandwidth (6)
—
—
—
—
t_{PLL_PSERR}
Accuracy of PLL phase shift
—
—
t_{AR ES ET}
Minimum pulse width on a reset signal
10
—
t_INCCJ (4)
Input clock cycle to cycle jitter (F_REF ≥ 100 MHz)
Input clock cycle to cycle jitter (F_REF < 100 MHz)
—
—
—
—
t_{OUTPJ_DC} (5)
Period jitter for dedicated clock output (F_OUT ≥ 100 MHz)
Period jitter for dedicated clock output (F_OUT < 100 MHz)
—
—
—
—
t_{OUTCCJ_DC} (5)
Cycle-to-cycle jitter for dedicated clock output (F_OUT ≥ 100 MHz)
Cycle-to-cycle jitter for dedicated clock output (F_OUT < 100 MHz)
—
—
—
—
t_{OUTPJ_IO} (5)
Period Jitter for clock output on regular IO (F_OUT ≥ 100 MHz)
Period Jitter for clock output on regular IO (F_OUT < 100 MHz)
—
—
—
—
t_{OUTCCJ_IO} (5)
Cycle-to-cycle jitter for clock output on regular IO
(F_OUT ≥ 100 MHz)
Cycle-to-cycle jitter for clock output on regular IO
(F_OUT < 100 MHz)
—
—
—
—
Max
717 (2)
325
1300
60
600 (3)
717 (3)
55
10
—
—
100
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
MHz
MHz
MHz
%
MHz
MHz
%
ns
scanclk
cycles
scanclk
cycles
MHz
ms
ms
MHz
MHz
MHz
ps
ns
UI (p-p)
ps (p-p)
ps (p-p)
mUI (p-p)
ps (p-p)
mUI (p-p)
ps (p-p)
mUI (p-p)
ps (p-p)
—
mUI (p-p)
HardCopy IV Device Handbook Volume 4
© June 2009 Altera Corporation