HC4GX15 Datasheet, PDF (55/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 6: HardCopy IV Device I/O Features
6–5
HardCopy IV I/O
Table 6–2. HardCopy IV I/O Standards and Voltage Levels (Part 2 of 2)
I/O Standard
Standard
Support
VCCIO (V) (Note 1)
Input Operation
Output Operation
Column I/O
Banks
Row I/O
Banks
Column I/O
Banks
Row I/O
Banks
V_CCPD (V)
(Pre-Driver
Voltage)
V_REF (V)
(Input Ref
Voltage)
VTT (V)
(Board
Termination
Voltage)
Differential
JESD8-6
(2)
(2)
1.5
—
2.5
—
0.75
HSTL-15 Class II
Differential
JESD8-16A
(2)
(2)
1.2
1.2
2.5
—
0.60
HSTL-12 Class I
Differential
JESD8-16A
(2)
(2)
1.2
—
2.5
—
0.60
HSTL-12 Class II
LVDS
(3), (4)
ANSI/TIA/
(2)
(2)
2.5
2.5
2.5
—
—
EIA-644
RSDS
(5), (6)
—
(2)
(2)
2.5
2.5
2.5
—
—
mini-LVDS
(5), (6)
—
(2)
(2)
2.5
2.5
2.5
—
—
LVPECL
—
(3)
2.5
—
—
2.5
—
—
Notes to Table 6–2:
(1) V_CCPD is either 2.5 or 3.0 V. For V_CCIO = 3.0 V, V_CCPD = 3.0 V. For V_CCIO = 2.5 V or less, V_CCPD = 2.5 V.
(2) Single-ended HSTL/SSTL, differential SSTL/HSTL, and LVDS input buffers are powered by V_CCPD. Row I/O banks support both true differential
input buffers and true differential output buffers. Column I/O banks support true differential input buffers, but not true differential output buffers.
I/O pins are organized in pairs to support differential standards. Column I/O differential HSTL and SSTL inputs use LVDS differential input
buffers without on-chip R_D support.
(3) Column I/O banks support LVPECL I/O standards for input clock operation. Clock inputs on column I/O are powered by V_CCCLKIN when configured
as differential clock input. They are powered by V_CCIO when configured as single-ended clock input. Differential clock inputs in row I/O are
powered by V_CCPD.
(4) Column and row I/O banks support LVDS outputs using two single-ended output buffers, an external one-resistor (LVDS_E_1R), and a
three-resistor (LVDS_E_3R) network.
(5) Row I/O banks support RSDS and mini-LVDS I/O standards using a dedicated LVDS output buffer without a resistor network.
(6) Column and row I/O banks support RSDS and mini-LVDS I/O standards using two single-ended output buffers with one-resistor (RSDS_E_1R
and mini-LVDS_E_1R) and three-resistor (RSDS_E_3R and mini-LVDS_E_3R) networks.
HardCopy IV I/O
HardCopy IV devices contain up to 20 I/O banks, as shown in Figure 6–1. For the
1152- and 1517-pin packages there are 20 available I/O banks; for the 780-pin package
there are 16 available I/O banks. Row I/O banks contain true differential input and
output buffers and banks with dedicated circuitry to support differential standards at
speeds up to 1.25 Gbps.
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 1