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HC4GX15 Datasheet, PDF (107/668 Pages) Altera Corporation – HardCopy IV Device Handbook
Chapter 7: External Memory Interfaces in HardCopy IV Devices
7–41
HardCopy IV External Memory Interface Features
IOE Features
This section describes how OCT, delay chains, output delay, slew rate control, and
drive strength setting are useful in memory interfaces.
1 These IOE features are mask programmed and cannot be changed after the silicon is
fabricated.
f For more information about the features listed below, refer to the HardCopy IV Device
I/O Features chapter.
OCT
HardCopy IV devices feature dynamic calibrated OCT, in which the series
termination (OCT RS) is turned on when driving signals and turned off when
receiving signals, and the parallel termination (OCT RT) is turned off when driving
signals and turned on when receiving signals. This feature complements the
DDR3/DDR2 SDRAM on-die termination (ODT), in which the memory termination is
turned off when the memory is sending data and turned on when receiving data. You
can use OCT for other memory interfaces to improve signal integrity.
1 You cannot use the drive strength and slew rate features when using OCT RS.
To use the dynamic calibrated OCT feature, you must use the RUP and RDN pins to
calibrate the OCT calibration block. You can use one OCT calibration block to calibrate
one type of termination with the same VCCIO on the entire device. There are up to eight
OCT calibration blocks to allow for different types of terminations throughout the
device. For more information, refer to “Dynamic On-Chip Termination Control” on
page 7–38.
1 You have the option to use the OCT RS feature with or without calibration. However,
the OCT RT feature is only available with calibration.
You can also use the RUP and RDN pins as DQ pins, so you cannot use the DQS/DQ
groups where the RUP and RDN pins are located if you are planning to use dynamic
calibrated OCT. The RUP and RDN pins are located in the first and last ×4 DQS/DQ
group on each side of the device.
Use the OCT RT or RS setting for unidirectional read-and-write data and a dynamic
OCT setting for bidirectional data signals.
IOE Delay Chains
You can use the delay chains in the HardCopy IV I/O registers as deskewing circuitry.
Each pin can have a different input delay from the pin to the input register or a delay
from the output register to the output pin to ensure that the bus has the same delay
going into or out of the device. This feature helps read and write time margins as it
minimizes the uncertainties between signals in the bus.
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 1