HC4GX15 Datasheet, PDF (641/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: DC and Switching Characteristics of HardCopy IV Devices
1–11
Electrical Characteristics
Table 1–19. Differential I/O Standard Specifications—Preliminary (Note 1) (Part 2 of 2)
I/O
Standard
V_CCIO (V)
V_ID (mV)
V_ICM(DC) (V)
Min Typ Max Min Condition Max Min Condition Max
V_OD (V) (2)
Min Typ Max
V_OCM (V) (2)
Min Typ Max
2.5V LVDS
(VIO)
2.375 2.5 2.625 100 V_CM = 1.25 V
—
—
0.05 DMAX ≤ 700
(4)
Mbps
1.05 D_MAX> 700
(4)
Mbps
1.8
(4)
0.247 — 0.6
1.55
(4)
—
——
1
—
1.25
—
1.5
—
RSDS
(HIO)
2.375 2.5 2.625 100 VCM = 1.25 V — 0.3
—
1.4 0.1 0.2 0.6 0.5 1.2 1.4
RSDS (VIO) 2.375 2.5 2.625 100 VCM = 1.25 V — 0.3
Mini-LVDS
(HIO)
2.375 2.5 2.625 200
—
600 0.4
—
1.4 0.1 0.2 0.6 0.5 1.2 1.5
—
1.325 0.25 — 0.6 0.5 1.2 1.4
Mini-LVDS
(VIO)
2.375 2.5 2.625 200
—
600 0.4
—
1.325 0.25 — 0.6 0.5 1.2 1.5
LVPECL
2.375
(6)
2.5
(6)
2.625
(6)
300
—
(VIO) (5)
——— —
—
—
0.6
D_MAX ≤ 700
Mbps
1.8
(3)
— —— — —
—
—
0.6
D_MAX > 700
Mbps
1.6
(3)
— —— — —
—
Notes to Table 1–19:
(1) VIO (vertical I/O) is top and bottom I/Os; HIO (horizontal I/O) is left and right I/Os.
(2) RL range: 90 ≤ RL ≤ 110 Ω.
(3) For D_MAX > 700 Mbps, the minimum input voltage is 0.85 V; the maximum input voltage is 1.75 V. For F_MAX ≤ 700 Mbps, the minimum input voltage
is 0.45 V; the maximum input voltage is 1.95 V.
(4) For data rate: D_MAX > 700 Mbps, the minimum input voltage is 1.0 V, the maximum input voltage is 1.6 V. For D_MAX ≤ 700 Mbps, the minimum input
voltage is 0 V, the maximum input voltage is 1.85 V.
(5) Column and row I/O banks support LVPECL I/O standards for input operation only on dedicated clock input pins. Differential clock inputs in column
I/O use V_{CC_CLKIN}, which must be powered by 2.5 V. Differential clock inputs in row I/Os are powered by V_CCPD.
(6) The power supply for column I/O LVPECL differential clock input buffer is V_{CC_CLKIN}.
Power Consumption
Altera offers two ways to estimate power consumption for a design: the Excel-based
PowerPlay EPE and the Quartus^® II PowerPlay Power Analyzer feature.
Use the interactive Excel-based PowerPlay EPE prior to designing to get a magnitude
estimate of the device power. The Quartus II PowerPlay Power Analyzer provides
better quality estimates based on the specifics of the design after place-and-route is
complete. The PowerPlay Power Analyzer can apply a combination of user-entered,
simulation-derived, and estimated signal activities that, combined with detailed
circuit models, can yield very accurate power estimates.
Refer to Table 1–6 on page 1–6 for supply current estimates for V_CCPGM and V . _{CC_CLKIN}
Use the PowerPlay EPE and Power Analyzer for current estimates of the remaining
power supplies.
f For more information about power estimation tools, refer to the PowerPlay Early
Power Estimator page on the Altera website and the PowerPlay Power Analysis chapter
in volume 3 of the Quartus II Handbook.
© June 2009 Altera Corporation
HardCopy IV Device Handbook Volume 4