HC4GX15 Datasheet, PDF (187/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV Design Flow Using the Quartus II Software
1–19
Quartus II Fitter Settings
Figure 1–11. Design Partition with Empty Netlist Type
When a partition Netlist Type is defined as Empty, virtual pins are automatically
created at the boundary of the partition. This means that the software temporarily
maps the I/O pins in the lower-level design entity to the internal cells instead of the
pins during compilation. Any child partitions below an empty partition in the design
hierarchy are also automatically treated as empty, regardless of their settings.
After the design partition with the empty Netlist Type is completed and you have
defined “inst3” in the top module, the Quartus II software is ready to recompile the
“inst3” design partition.
First, set the Netlist Type of the design partition “inst2” to the specific preservation
target, such as Post-Synthesis or Post-Fit to preserve the performance results from
the previous compilation. Before you recompile the design, ensure that you set the
Netlist Type of the design partition “inst3” to Source File because this is new design
source for the Quartus II software.
As in the traditional top-down design flow, the Quartus II software merges the new
compiled design partition “inst3” into a complete netlist for the subsequent stages of
the compilation flow. Therefore, the turnaround time for the design compilation is
reduced.
Quartus II Fitter Settings
To make the HardCopy IV device implementation more robust across process,
temperature, and voltage variations, the Altera HardCopy Design Center requires
that you enable Multicorner Optimization for the Quartus II Fitter. This setting
controls whether the Fitter optimizes a design to meet timing requirements at the
fast-timing process corner and operating condition, as well as at the slow-timing
process corner and operating condition. The Altera HardCopy Design Center also
requires that you enable the Optimize hold timing setting for the Quartus II Fitter.
This setting allows the Fitter to optimize hold time by adding delay to the appropriate
paths.
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 2