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HC4GX15 Datasheet, PDF (223/668 Pages) Altera Corporation – HardCopy IV Device Handbook
Chapter 3: Mapping Stratix IV Device Resources to HardCopy IV Devices
3–21
Designing with HardCopy IV I/Os
Table 3–13. LVDS Channels Supported In HardCopy IV GX and Stratix IV GX Companion Devices (Note 1), (2) (Part 3 of 3)
780-Pin FineLine BGA
1152-Pin FineLine BGA 1152-Pin FineLine BGA
1152-Pin FineLine BGA
1517-Pin FineLine BGA
HardCopy I V
GX ASIC
Stratix IV
GX FPGA
Prototype
HardCopy
IV GX ASIC
Stratix IV
Stratix IV
GX FPGA HardCopy IV GX FPGA
Prototype GX ASIC Prototype
Stratix IV
HardCopy IV GX FPGA HardCopy IV
GX ASIC Prototype GX ASIC
Stratix IV
GX FPGA
Prototype
Bank
HC4GX15
EP4SGX70
EP4SGX110
EP4SGX180
EP4SGX230
HC4GX25
EP4SGX110
HC4GX25
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
(3)
HC4GX35
EP4SGX230
EP4SGX360
EP4SGX530
(3)
HC4GX35
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
(4)
8C 6Rx + 6eTx 6Rx + 6eTx 6Rx + 6eTx 6Rx + 6eTx 8Rx + 8eTx 8Rx + 8eTx 8Rx + 8eTx 8Rx + 8eTx 8Rx + 8eTx 8Rx + 8eTx
(5)
or
or
or
or
or
or
or
or
or
or
12eTx
12eTx
12eTx
12eTx
16eTx
16eTx
16eTx
16eTx
16eTx
16eTx
Notes to Table 3–13:
(1) Channel counts are preliminary.
(2) Rx = true LVDS input buffers with OCT RD, Tx = true LVDS output buffers, and eTx = emulated LVDS output buffers (either LVDS_E_1R or
LVDS_E_3R).
(3) The EP4SGX530 FPGA is offered only in the H1152 package.
(4) The EP4SGX530 FPGA is offered only in the H1517 package.
(5) Top and bottom I/O banks do not have DPA, synchronizer, data realignment, and differential termination support in Stratix IV GX and
HardCopy IV GX devices. Use left and right I/O banks if these features and maximum performance is required.
Table 3–15 and Table 3–14 show the LVDS channels supported in HardCopy IV E and
Stratix IV E companion devices for the socket replacement and non-socket
replacement flows, respectively.
Table 3–14. LVDS Channels Supported In HardCopy IV E and Stratix IV E Companion Devices with Socket Replacement Flow
(Note 1), (2) (Part 1 of 3)
Bank
1A
1B
1C
2A
2B
2C
3A (6)
3B (6)
780-Pin FineLine BGA
HardCopy IV E
Stratix IV E
ASIC
FPGA Prototype
HC4E25
8Rx + 8Tx (7)
—
6Rx + 6Tx
8Rx + 8Tx (7)
—
6Rx + 6Tx
10Rx + 10eTx
or
20eTx
—
EP4SE230
EP4SE360 (3)
8Rx + 8Tx
—
6Rx + 6Tx
8Rx + 8Tx
—
6Rx + 6Tx
10Rx + 10eTx
or
20eTx
—
1152-Pin FineLine BGA
HardCopy IV E
Stratix IV E
ASIC
FPGA Prototype
HC4E35
12Rx + 12Tx
—
10Rx + 10Tx
12Rx + 12Tx
—
10Rx + 10Tx
10Rx + 10eTx
or
20eTx
6Rx + 6eTx
or
12eTx
EP4SE360
EP4SE530 (4)
EP4SE820 (4)
12Rx + 12Tx
—
10Rx + 10Tx
12Rx + 12Tx
—
10Rx + 10Tx
10Rx + 10eTx
or
20eTx
6Rx + 6eTx
or
12eTx
1517-Pin FineLine BGA
HardCopy IV E
Stratix IV E
ASIC
FPGA Prototype
HC4E35
12Rx + 12Tx
—
10Rx + 10Tx
12Rx + 12Tx
—
10Rx + 10Tx
12Rx + 12eTx
or
24eTx
12Rx + 12eTx
or
24eTx
EP4SE530 (5)
EP4SE820
12Rx + 12Tx
6Rx + 6Tx
10Rx + 10Tx
12Rx + 12Tx
6Rx + 6Tx
10Rx + 10Tx
12Rx + 12eTx
or
24eTx
12Rx + 12eTx
or
24eTx
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 2