HC4GX15 Datasheet, PDF (29/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 2: Logic Array Block and Adaptive Logic Module Implementation in HardCopy IV Devices
2–3
ALM and LAB Function Implementation
Based on design requirements, the Quartus II software chooses the appropriate HCell
macros to implement design functionality. For example, Stratix IV ALMs offer flexible
look-up table (LUT) blocks, registers, arithmetic blocks, and LAB-wide control
signals. In HardCopy IV devices, if your design requires these architectural elements,
the Quartus II synthesis tool maps the design to the appropriate HCell macros,
resulting in improved design performance compared to the Stratix IV FPGA
prototype, as shown in Figure 2–2.
Figure 2–2. Example of ALM Functions Mapped to HCell Macros
Stratix IV
Reg
Adder
Comb.
Logic
Adder
Reg
HardCopy IV
Logic Function
HCM
Logic Function
HCM
Adder HCM
Register
HCM
© December 2008 Altera Corporation
HardCopy IV Device Handbook, Volume 1