HC4GX15 Datasheet, PDF (565/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Description of Transceiver Channel Reconfiguration Modes
2–107
Blocks Reconfigured in CMU PLL Reconfiguration Mode
Each transceiver block has two CMU PLLs—CMU0 PLL and CMU1 PLL.You can
reconfigure each of these CMU PLLs to a different data rate in this dynamic
reconfiguration mode. Figure 2–50 shows a conceptual view of both CMU PLLs in a
transceiver block.
Figure 2–50. CMU PLLs in a Transceiver Block
CMU Channels
refclk0
refclk1
clock
mux
CMU0 PLL
full duplex transceiver channel
TX CHANNEL
Logical
TX PLL
select
LOCAL
DIVIDER
digital+analog logic
clock
mux
CMU1 PLL
RX CHANNEL
clock
mux
RX PLL
digital+analog logic
Blocks that can be reconfigured in CMU PLL Reconfiguration mode
ALTGX MegaWizard Plug-In Manager Setup for CMU PLL Reconfiguration Mode
When you want to reconfigure the CMU PLL to another data rate, enable .mif
generation and set up the ALTGX MegaWizard Plug-In Manager as described in the
following steps. The dynamic reconfiguration controller reconfigures the CMU PLL
with the new information stored in the .mif.
1. Select the Channel and Transmitter PLL reconfiguration option in the Reconfig
screen.
2. Provide the new data rate you want the CMU PLL to run at in the General screen.
3. Provide the logical reference index value in the What is the main PLL logical
reference index? option in the Reconfig Clks screen.
For more information, refer to “Selecting the Logical Reference Index of the CMU
PLL” on page 2–77.
© June 2009 Altera Corporation
HardCopy IV Device Handbook, Volume 3