HC4GX15 Datasheet, PDF (575/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Description of Transceiver Channel Reconfiguration Modes
2–117
Table 2–31. Example for the Specifying the Input Reference Clocks (Part 3 of 4)
ALTGX Instances and Settings
ALTGX Setting
What is the main transmitter
PLL logical reference index?
option in the Reconfig Clks
screen
What is the selected input
clock source for the
Transmitter PLL and Receiver
PLL? option in the Reconfig
Clks screen
What is the selected input
clock source for the alternate
transmitter PLL? option in the
Reconfig Clks screen
ALTGX Instance 1
ALTGX Instance 2
■ The ALTGX MegaWizard
Plug-In Manager
automatically sets up the
logical reference index of the
main PLL as the inverse of
the logical reference index of
the alternate transmitter PLL
■ The ALTGX MegaWizard
Plug-In Manager
automatically sets up the
logical reference index of the
main PLL as the inverse of
the logical reference index of
the alternate transmitter PLL
■ In this case, the logical
reference index of the main
transmitter PLL is set up as
1.
■ In this case, the logical
reference index of the main
transmitter PLL is set up as
0.
■ In ALTGX instance 1, you
have set up the input
reference clock as
156.25 MHz for main
transmitter PLL
■ Assign an identification
number to 156.25 MHz.
Because there are a total of
two input reference clock
frequencies in this design
(156.25 MHz and 125 MHz),
you can assign a value of 1
or 2 (for example, 2)
■ In ALTGX instance 2, you
have set up the input
reference clock as 125 MHz
for main transmitter PLL
■ Assign an identification
number to 125 MHz.
Because there are a total of
two input reference clock
frequencies in this design
(156.25 MHz and 125 MHz),
you can assign a value of 1
or 2 (for example, 1)
When you set up the
identification number of the
input clock source for the main
transmitter PLL (156.25 MHz)
as 2, you must set up the
identification of the input clock
source for the alternate
transmitter PLL (125 MHz) as
1.
When you set up the
identification number of the
input clock source for the main
transmitter PLL (125 MHz) as
2, you must set up the
identification of the input clock
source for the alternate
transmitter PLL (156.25 MHz)
as 1.
© June 2009 Altera Corporation
HardCopy IV Device Handbook, Volume 3