HC4GX15 Datasheet, PDF (352/668 Pages) Altera Corporation – HardCopy IV Device Handbook

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Chapter 1: HardCopy IV GX Transceiver Architecture
Receiver Channel Datapath
Figure 1–65 shows the receiver polarity inversion feature in double-width 20 bit wide
datapath configurations.
Figure 1–65. Receiver Polarity Inversion in Double-Width Mode
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rx_invpolarity = HIGH
To Word Aligner
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Output from Deserializer
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Input to Word Aligner
Receiver Bit Reversal
By default, the HardCopy IV GX receiver assumes a LSBit-to-MSBit transmission. If
the transmission order is MSBit-to-LSBit, the receiver forwards the bit-flipped version
of the parallel data to the core fabric on the rx_dataout port. The receiver bit
reversal feature is available to correct this situation.
The receiver bit reversal feature is available through the rx_revbitordwa port only
in Basic single-width and double-width modes with the word aligner configured in
bit-slip mode.
When the rx_revbitordwa signal is driven high in Basic single-width mode, the
8-bit or 10-bit data D[7:0] or D[9:0] at the output of the word aligner gets rewired
to D[0:7] or D[0:9], respectively.
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation