HC4GX15 Datasheet, PDF (24/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–14
Chapter 1: HardCopy IV Device Family Overview
Architectural Features
■ Synchronizer (FIFO buffer)
■ PLLs
f For more information about dedicated circuitry for high-speed differential support,
refer to the High Speed Differential I/O Interfaces with DPA in HardCopy IV Devices
chapter in volume 1 of the HardCopy IV Device Handbook.
Hot Socketing and Power-On Reset
HardCopy IV devices offer hot socketing, which is also known as hot plug-in or hot
swap, and power sequencing support without the use of any external devices.
On-chip hot socketing and power-sequencing support ensures proper device
operation independent of the power-up sequence. You can insert or remove a
HardCopy IV board during system operation without causing undesirable effects to
the running system bus or the board itself.
The hot socketing feature also makes it easier to use HardCopy IV devices on PCBs
that contain a mixture of 3.0-V, 2.5-V, 1.8-V, 1.5-V, and 1.2-V devices. With the
HardCopy IV hot socketing feature, you do not need to ensure a proper power-up
sequence for each device on the board.
1 HardCopy IV devices have a maximum V_CCIO voltage of 3.0 V, but can tolerate a 3.3-V
input level.
f For more information about hot socketing, refer to the Hot Socketing and Power-On
Reset in HardCopy IV Devices chapter in volume 1 of the HardCopy IV Device Handbook.
IEEE 1149.1 (JTAG) Boundary Scan Testing
HardCopy IV devices support the JTAG IEEE Std. 1149.1 specification. The
Boundary-Scan Test (BST) architecture offers the capability to both test pin
connections without using physical test probes and capture functional data while a
device is operating normally. Boundary-scan cells in the HardCopy IV device can
force signals onto pins or capture data from the pin or core signals. Forced test data is
serially shifted into the boundary-scan cells. Captured data is serially shifted out and
externally compared to expected results.
f For more information about JTAG, refer to the IEEE 1149.1 (JTAG) Boundary Scan
Testing in HardCopy IV Devices chapter in volume 1 of the HardCopy IV Device
Handbook.
Signal Integrity
HardCopy IV devices simplify the challenge of maintaining signal integrity through a
number of chip-, package-, and board-level enhancements to enable efficient
high-speed data transfer into and out of the device. These enhancements include:
■ 8:1:1 user I/O/GND/V_CC ratio to reduce loop inductance in the package
■ Dedicated power supply for each I/O bank, with an I/O limit of 24 to 48 I/Os per
bank to help limit simultaneous switching noise (SSN)
HardCopy IV Device Handbook, Volume 1
© January 2010 Altera Corporation