HC4GX15 Datasheet, PDF (324/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–60
Chapter 1: HardCopy IV GX Transceiver Architecture
Receiver Channel Datapath
■ Signal threshold detection circuitry
Programmable Differential On-Chip Termination
The HardCopy IV GX receiver buffers support optional differential on-chip
termination resistors of 85, 100, 120, and 150 Ω . To select the desired receiver OCT
resistor, make the assignments shown in Table 1–12 in the Quartus II software
Assignment Editor.
Table 1–12. HardCopy IV GX Receiver On-Chip Termination Assignment Settings
Assign To
Assignment Name:
Available Values:
rx_datain (Receiver Input Data Pins)
Input Termination
OCT 85 Ω , OCT 100 Ω , OCT 120 Ω , OCT 150 Ω , Off
1 The HardCopy IV GX receiver OCT resistors have calibration support to compensate
for process, voltage, and temperature variations. For more information about OCT
calibration support, refer to “Calibration Blocks” on page 1–192.
Programmable Common Mode Voltage
The HardCopy IV GX receiver buffers have on-chip biasing circuitry to establish the
required common mode voltage at the receiver input. It supports common mode
voltage settings of 0.82 V and 1.1 V that you can select in the ALTGX MegaWizard
Plug-In Manager.
You must select 0.82 V as the receiver buffer common mode voltage for the following
receiver input buffer I/O standards:
■ 1.4-V PCML
■ 1.5-V PCML
■ 2.5-V PCML
■ LVPECL
You must select 1.1 V as the receiver buffer common mode voltage for the LVDS
receiver input buffer I/O standard.
1 On-chip biasing circuitry is effective only if you select on-chip receiver termination.
If you select external termination, you must implement off-chip biasing circuitry to
establish the common mode voltage at the receiver input buffer.
Link Coupling
A high-speed serial link can either be AC-coupled or DC-coupled, depending on the
serial protocol being implemented. Most of the serial protocols require links to be
AC-coupled, but protocols such as Common Electrical I/O (CEI) optionally allow DC
coupling.
AC-Coupled Links
In an AC-coupled link, the AC coupling capacitor blocks the transmitter DC common
mode voltage. The on-chip or off-chip receiver termination and biasing circuitry
automatically restores the selected common mode voltage. Figure 1–48 shows an
AC-coupled link.
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation