HC4GX15 Datasheet, PDF (474/668 Pages) Altera Corporation – HardCopy IV Device Handbook

2–16
Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Quartus II MegaWizard Plug-In Manager Interfaces to Support Dynamic
Table 2–2. Dynamic Reconfiguration Controller Port List (ALTGX_RECONFIG Instance) (Part 6 of 9)
Port Name
tx_preemp_2t[4..0] (1)
rx_eqctrl[3..0] (1)
Input/
Output
Input
Input
Description
This is an optional pre-emphasis write control for the second
post-tap for the transmit buffer. This signal controls both
pre-emphasis positive and its inversion. Depending on what value
you set at this input, the controller dynamically writes the value to
the pre-emphasis control register of the transmit buffer.
The width of this signal is fixed to 5 bits if you enable either the Use
'logical_channel_address' port for Analog controls
reconfiguration option or the Use same control signal for all the
channels option in the Analog controls screen. Otherwise, the
width of this signal is 5 bits per channel.
For more information, refer to “Dynamically Reconfiguring PMA
Controls” on page 2–53.
The following values are the legal settings allowed for this signal:
0 represents 0
1-15 represents -15 to -1
16 represents 0
17-31 represents 1 to 15
In PCI Express (PIPE) configuration, set tx_preemp_2t[4:0]
to 5'b00000 when you do a rate switch from Gen 1 to Gen 2 mode.
This is to ensure that tx_preemp_2t[4:0] does not add to the
signal boost when tx_pipemargin, tx_pipeswing, and
tx_pipedeemph take affect in PCI Express (Gen 2) mode.
For more information, refer to the Programmable Pre-Emphasis
section of the HardCopy IV GX Transceiver Architecture chapter in
volume 3 of the HardCopy IV Device Handbook.
This is an optional write control to write an equalization control
value for the receive side of the PMA.
The width of this signal is fixed to 4 bits if you enable either the Use
'logical_channel_address' port for Analog controls
reconfiguration option or the Use same control signal for all the
channels option in the Analog controls screen. Otherwise, the
width of this signal is 4 bits per channel.
For more information, refer to “Dynamically Reconfiguring PMA
Controls” on page 2–53 and the Programmable Equalization and
DC Gain section of the HardCopy IV GX Transceiver Architecture
chapter in volume 3 of the HardCopy IV Device Handbook.
HardCopy IV Device Handbook, Volume 3
© June 2009 Altera Corporation