HC4GX15 Datasheet, PDF (377/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV GX Transceiver Architecture
Receiver Channel Datapath
1–113
Table 1–27. Byte Ordering Pattern Length in Basic Double-Width Mode
Functional Mode
Byte Ordering
Pattern Length
Byte Ordering PAD
Pattern Length
Basic double-width mode with:
■ 32-bit core fabric-transceiver interface
16 bit, 8 bit
8 bit
■ No 8B/10B decoder (16-bit PMA-PCS interface)
■ Word aligner in manual alignment mode
Basic double-width mode with:
■ 32-bit core fabric-transceiver interface
18 bit, 9 bit (1)
9 bit
■ 8B/10B decoder (20-bit PMA-PCS interface)
■ Word aligner in manual alignment mode
Basic double-width mode with:
■ 40-bit core fabric-transceiver interface
■ No 8B/10B decoder (20-bit PMA-PCS interface)
20 bit, 10 bit
10 bit
■ Word aligner in manual alignment mode
Note to Table 1–27:
(1) The 18-bit byte ordering pattern D[17:0] consists of MSByte D[17:9] and LSByte D[8:0], D[17]
corresponds to rx_ctrldetect[1] and D[16:9] corresponds to rx_dataout[15:8]. Similarly, D[9]
corresponds to rx_ctrldetect[0] and D[7:0] corresponds to rx_dataout[7:0].
The byte ordering block modes of operation in both single-width and double-width
modes are:
■ Word-alignment-based byte ordering
■ User-controlled byte ordering
Word-Alignment-Based Byte Ordering
In word-alignment-based byte ordering, the byte ordering block starts looking for the
byte ordering pattern in the byte-deserialized data every time it sees a rising edge on
the rx_syncstatus signal. After a rising edge on the rx_syncstatus signal, if the
byte ordering block finds the first data byte that matches the programmed byte
ordering pattern in the MSByte position of the byte-deserialized data, it inserts one
programmed PAD pattern to push the byte ordering pattern in the LSByte position. If
the byte ordering block finds the first data byte that matches the programmed byte
ordering pattern in the LSByte position of the byte-deserialized data, it considers the
data to be byte ordered and does not insert any PAD pattern. In either case, the byte
ordering block asserts the rx_byteorderalignstatus signal.
1 You can choose word-alignment-based byte ordering by selecting the sync status
signal from the word aligner tab in the What do you want the byte ordering to be
based on? field in the ALTGX MegaWizard Plug-In Manager.
© June 2009 Altera Corporation
HardCopy IV Device Handbook Volume 3