HC4GX15 Datasheet, PDF (278/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–14
Chapter 1: HardCopy IV GX Transceiver Architecture
Transceiver Port List
Table 1–2. HardCopy IV GX ALTGX Megafunction Ports (Part 7 of 14)
Port Name
rx_runningdisp
Input/Output
Description
Output 8B/10B running disparity indicator.
This feature is available in configurations with
the 8B/10B decoder. A high level indicates that
data on the rx_dataout port was received
with a negative running disparity. A low level
indicates that data on the rx_dataout port
was received with a positive running disparity.
The width of this signal depends on the
following channel width:
Channel Width rx_runningdisp
8
1
16
2
32
4
Byte Ordering Block
rx_enabyteord
rx_byteorderalignstatus
Input
Output
Enable byte ordering control. This feature is
available in configurations with the byte
ordering block enabled. The byte ordering block
is rising-edge sensitive to this signal. A
low-to-high transition triggers the byte ordering
block to restart the byte ordering operation.
Asynchronous signal.
Byte ordering status indicator. This feature is
available in configurations with the byte
ordering block enabled. A high level indicates
that the byte ordering block has detected the
programmed byte ordering pattern in the
LSByte of the received data from the byte
deserializer.
Receiver Phase Compensation FIFO
rx_dataout
rx_clkout
rx_coreclk
Output
Output
Input
Parallel data output from the receiver to the
core fabric. The bus width depends on the
channel width multiplied by the number of
channels per instance.
Recovered clock from the receiver channel.
This feature is available only when the rate
match FIFO is not used in the receiver datapath.
Optional read clock port for the receiver phase
compensation FIFO. If not selected, the
Quartus II software automatically selects
rx_clkout/tx_clkout/coreclkout
as the read clock for the receiver phase
compensation FIFO. If selected, you must drive
this port with a clock that has 0 PPM difference
with respect to rx_clkout/tx_clkout/
coreclkout.
Scope
Channel
Channel
Channel
Channel
Channel
Channel
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation