HC4GX15 Datasheet, PDF (183/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV Design Flow Using the Quartus II Software
1–15
Incremental Compilation
TimeQuest Multicorner Timing Analysis Setting
The Altera HardCopy Design Center requires that all HardCopy handoff files include
a TimeQuest analyzer timing report for design review. In the TimeQuest analyzer
timing report, you must include both fast- and slow-corner timing analysis for setup,
hold, and I/O paths. To do this, enable the Multicorner timing analysis during
compilation option on the TimeQuest Timing Analyzer page under Timing
Analysis Settings in the Quartus II software. This option directs the TimeQuest
analyzer to analyze the design and generate slack reports for the slow and fast
corners. Figure 1–6 shows the settings you must enable so that the TimeQuest
analyzer generates the appropriate reports.
Figure 1–6. TimeQuest Multicorner Timing Analysis Setting
Incremental Compilation
For the HardCopy development flow, the Quartus II design software offers
incremental compilation to preserve the compilation results for unchanged logic in
your design. This feature dramatically reduces your design iteration time by focusing
new compilations only on changed design partitions. New compilation results are
then merged with the previous compilation results from unchanged design partitions.
There are two approaches of incremental compilation in the Quartus II software:
■ Top-down incremental compilation
■ Bottom-up incremental compilation
1 Bottom-up incremental compilation flow is not supported for designs targeting
HardCopy ASICs.
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 2