HC4GX15 Datasheet, PDF (28/668 Pages) Altera Corporation – HardCopy IV Device Handbook

2–2
Chapter 2: Logic Array Block and Adaptive Logic Module Implementation in HardCopy IV Devices
ALM and LAB Function Implementation
Figure 2–1. Example Block Diagram of HardCopy IV Device (Note 1)
IOEs
PLL
IOEs (2)
PLL
Array of HCells
M144K Blocks
M9K Blocks
Notes to Figure 2–1:
(1) Figure 2–1 shows a graphical representation of the device floorplan. A detailed floorplan is available in the Quartus^® II software.
(2) IOEs represents I/O elements.
ALM and LAB Function Implementation
The Quartus II software uses a library of pre-characterized HCell macros (HCMs) to
place Stratix IV ALM configurations into the HardCopy IV HCell-based logic fabric.
An HCell macro defines how a group of HCells connect within the array. HCell
macros can construct all combinations of combinational logic, adder, and register
functions that can be implemented by a Stratix IV ALM. You can use HCells that are
not used for ALM configurations to implement MLAB and DSP block functions.
f For more details about implementing DSP block functions using HCells, refer to the
DSP Block Implementation in HardCopy IV Devices chapter in volume 1 of the
HardCopy IV Device Handbook.
HardCopy IV Device Handbook, Volume 1
© December 2008 Altera Corporation