HC4GX15 Datasheet, PDF (440/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–176
Chapter 1: HardCopy IV GX Transceiver Architecture
Functional Modes
SDI Mode Datapath
Figure 1–145 shows the transceiver datapath when configured in SDI mode.
Figure 1–145. SDI Mode Datapath
Core
Fabric
tx_coreclk
TX Phase
Compensation
FIFO
wrclk
rdclk
tx_clkout
Core Fabric-Transmitter
Interface Clock
RX Phase
Compensation
FIFO
Transmitter Channel PCS
Byte
Serializer
wrclk
rdclk
/2
Low-Speed Parallel Clock
Transmitter Channel PMA
Serializer
High-Speed
Serial Clock
Local
Clock
Divider
Receiver Channel PCS
Byte De-
serializer
Word
Aligner
Receiver Channel PMA
De-
Serializer
CDR
rx_coreclk
Core Fabric-Receiver
Interface Clock
rx_clkout
/2
Parallel
Recovered Clock
Transmitter Datapath
The transmitter datapath, in HD-SDI configuration with 10 bit wide core
fabric-transceiver interface, consists of the transmitter phase compensation FIFO and
the 10:1 serializer. The transmitter datapath, in HD-SDI and 3G-SDI configurations
with 20 bit wide core fabric-transceiver interface, also includes the byte serializer.
1 In SDI mode, the transmitter is purely a parallel-to-serial converter. SDI transmitter
functions, such as scrambling and cyclic redundancy check (CRC) code generation,
must be implemented in the core logic array.
Receiver Datapath
In the 10-bit channel width SDI configuration, the receiver datapath is comprised of
the clock recovery unit (CRU), 1:10 deserializer, word aligner in bit-slip mode, and
receiver phase compensation FIFO. In the 20-bit channel width SDI configuration, the
receiver datapath also includes the byte deserializer.
1 SDI receiver functions, such as de-scrambling, framing, and CRC checker, must be
implemented in the core logic array.
Receiver Word Alignment and Framing
In SDI systems, the word aligner in the receiver datapath is not useful because word
alignment and framing happens after de-scrambling. Altera recommends driving the
ALTGX megafunction rx_bitslip signal low to avoid having the word aligner
insert bits in the received data stream.
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation