HC4GX15 Datasheet, PDF (304/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–40
Chapter 1: HardCopy IV GX Transceiver Architecture
Transmitter Channel Datapath
Double-Width Mode
Figure 1–24 shows the byte serializer datapath in double-width mode.
Figure 1–24. Byte Serializer Datapath in Double-Width Mode (Note 1), (2)
datain[]
Byte Serializer dataout[]
/2
Low-Speed Parallel
Clock
Notes to Figure 1–24:
(1) Refer to Table 1–7 for the datain[] and dataout[] port width.
(2) The datain signal is the input from the core fabric that has already passed through the TX phase compensation
FIFO.
The operation in double-width mode is similar to that of single-width mode. For
example, assuming a channel width of 40, the byte serializer forwards
datain[19:0] first, followed by datain[39:20]. Table 1–7 shows the input and
output data widths of the byte serializer in double-width mode.
Table 1–7. Input and Output Data Width of the Byte Serializer in Double-Width Mode
Deserialization Width
Double-width mode
Input Data Width to the Byte
Serializer
32
40
Output Data Width from the
Byte Serializer
16
20
Asserting the tx_digitalreset signal resets the byte serializer block.
If you select the 8B/10B Encoder option in the ALTGX MegaWizard Plug-In Manager,
the 8B/10B encoder uses the output from the byte serializer. Otherwise, the byte
serializer output is forwarded to the serializer.
8B/10B Encoder
The 8B/10B encoder generates 10-bit code groups from the 8-bit data and 1-bit control
identifier. The 8B/10B encoder operates in two modes: single-width and
double-width.
■ In single-width mode, the 8B/10B encoder generates a 10-bit code group from the
8-bit data and 1-bit control identifier.
■ In double-width mode, there are two 8B/10B encoders that are cascaded together
to generate two 10-bit code groups from two 8-bit data and their respective control
identifiers.
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation