HC4GX15 Datasheet, PDF (360/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–96
Chapter 1: HardCopy IV GX Transceiver Architecture
Receiver Channel Datapath
Figure 1–74 shows rate match FIFO empty condition in PCI Express (PIPE) mode. The
rate match FIFO becomes empty after reading out data byte D3.
Figure 1–74. Rate Match FIFO Empty Condition in PCI Express (PIPE) Mode
datain
D1
D2
D3
D4
D5
D6
dataout
D1
D2
D3
/K30.7/
D4
D5
pipestatus[2:0]
xxx
xxx
xxx
3'b110
xxx
xxx
1 You can configure the rate match FIFO in low latency mode by turning off the Enable
Rate Match FIFO option in the ALTGX MegaWizard Plug-In Manager.
Rate Match FIFO in XAUI Mode
In XAUI mode, the rate match FIFO is capable of compensating for up to ±100 PPM
(200 PPM total) difference between the upstream transmitter and the local receiver
reference clock. The XAUI protocol requires the transmitter to send /R/ (/K28.0/)
code groups simultaneously on all four lanes (denoted as ||R|| column) during
inter-packet gaps, adhering to rules listed in the IEEE P802.3ae specification. The rate
match FIFO operation in XAUI mode is compliant to the IEEE P802.3ae specification.
The rate match operation begins after:
■ The synchronization state machine in the word aligner of all four channels
indicates synchronization was acquired by driving its rx_syncstatus signal
high
■ The deskew FIFO block indicates alignment was acquired by driving the
rx_channelaligned signal high
The rate match FIFO looks for the ||R|| column (simultaneous /R/ code group on
all four channels) and deletes or inserts the ||R|| column to prevent the rate match
FIFO from overflowing or under-running. It can insert or delete as many ||R||
columns as necessary to perform the rate match operation.
Two flags, rx_rmfifodatadeleted and rx_rmfifodatainserted, that indicate
rate match FIFO deletion and insertion events, respectively, are forwarded to the core
fabric. If an ||R|| column is deleted, the rx_rmfifodeleted flag from each of the
four channels goes high for one clock cycle per deleted ||R|| column. If an ||R||
column is inserted, the rx_rmfifoinserted flag from each of the four channels
goes high for one clock cycle per inserted ||R|| column.
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation