HC4GX15 Datasheet, PDF (345/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV GX Transceiver Architecture
1–81
Receiver Channel Datapath
Manual Alignment Mode Word Aligner with 16-Bit PMA-PCS Interface Modes
In manual alignment mode, the word aligner starts looking for the programmed 8-bit,
16-bit, or 32-bit word alignment pattern in the received data stream as soon as
rx_digitalreset is de-asserted low. It aligns to the first word alignment pattern
received regardless of the logic level driven on the rx_enapatternalign signal.
Any word alignment pattern received thereafter in a different word boundary does
not cause the word aligner to re-align to this new word boundary. After the initial
word alignment following de-assertion of the rx_digitalreset signal, if a word
re-alignment is required, you must use the rx_enapatternalign signal.
Word aligner operation is controlled by the input signal rx_enapatternalign and
is edge-sensitive to the rx_enapatternalign signal. A rising edge on the
rx_enapatternalign signal triggers the word aligner to look for the word
alignment pattern in the received data stream. The word aligner aligns the 16-bit
word boundary to the first word alignment pattern received after the rising edge on
the rx_enapatternalign signal. Any word alignment pattern received thereafter
in a different word boundary does not cause the word aligner to re-align to this new
word boundary. If another word re-alignment is required, you must de-assert and
re-assert the rx_enapatternalign signal to create a rising edge on this signal.
Two status signals, rx_syncstatus and rx_patterndetect, with the same
latency as the datapath, are forwarded to the core fabric to indicate word aligner
status.
After receiving the first word alignment pattern, the rx_patterndetect signal is
driven high for one parallel clock cycle synchronous to the data that matches the
MSByte of the word alignment pattern. Any word alignment pattern received
thereafter in the same word boundary causes rx_patterndetect to go high for one
parallel clock cycle.
After receiving the first word alignment pattern, the rx_syncstatus signal is
constantly driven high until the word aligner sees another rising edge on the
rx_enapatternalign signal. The rising edge on the rx_enapatternalign signal
re-triggers the word alignment operation.
Figure 1–63 shows the manual alignment mode word aligner operation in 16-bit
PMA-PCS interface mode. In this example, a 16'hF628 is specified as the word
alignment pattern. The word aligner aligns to the 16'hF628 pattern received in cycle n
after de-assertion of rx_digitalreset. The rx_patterndetect[1] signal is
driven high for one parallel clock cycle. The rx_syncstatus[1] signal is driven
high constantly until cycle n + 2, after which it is driven low because of the rising edge
on the rx_enapatternalign signal that re-triggers the word aligner operation. The
word aligner receives the word alignment pattern again in cycle n + 4, causing the
rx_patterndetect[1] signal to be driven high for one parallel clock cycle and the
rx_syncstatus[1] signal to be driven high constantly.
© June 2009 Altera Corporation
HardCopy IV Device Handbook Volume 3