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HC4GX15 Datasheet, PDF (231/668 Pages) Altera Corporation – HardCopy IV Device Handbook
Chapter 3: Mapping Stratix IV Device Resources to HardCopy IV Devices
3–29
Power-Up and Configuration Pin Compatibility with Stratix IV Devices
Table 3–18. Mapping Configuration Pins into HardCopy IV Devices (Part 2 of 2) (Note 1), (2), (3), (4)
Stratix IV FPGA Prototype
Main Function Optional Function
HardCopy IV ASIC
Main Function Optional Function
Board Connection
I/O pin
nCSO
I/O pin
nCSO
No connection on board, except when EPCS
access is required in user mode.
nIO_PULLUP
—
nIO_PULLUP
—
Required connection.
I/O pin
CRC_ERROR (4)
I/O pin
Retains the same I/O functions from
—
Stratix IV, but not CRC_ERROR, because no
device programming is required.
I/O pin
DEV_CLRn
I/O pin
DEV_CLRn
Retains the same I/O functions from
Stratix IV.
I/O pin
DEV_OE
I/O pin
DEV_OE
Retains the same I/O functions from
Stratix IV.
Notes to Table 3–18:
(1) For correct operation of a HardCopy IV device, pull the nSTATUS, nCONFIG, and CONF_DONE pins to VCCPGM. In HardCopy IV devices, these
pins are designed with weak internal resistors pulled up to VCCPGM. Stratix IV configuration schemes require pull-up resistors on these I/O pins,
so they may already be present on the board. You can remove these external pull-up resistors, if doing so does not affect other FPGAs on the
board.
(2) HardCopy IV devices have a maximum VCCIO voltage of 3.0 V, but the input I/O pin can tolerate a 3.3 V level. This applies to VCCPGM voltage and
all dedicated and dual-purpose pins.
(3) For HardCopy IV devices, there is weak pull-up on the nSTATUS, CONF_DONE, nCONFIG, and DCLK pins. Therefore, these pins can be left
floating or remain connected to external pull-up resistors. If the EPCS is used in user mode as a boot-up RAM or data access for a Nios® II
processor, DCLK, DATA[0], ASDO, and nCSO must be connected to the EPCS device.
(4) In HardCopy IV devices, CRC_ERROR is hard-wired to logic 0 if the CRC feature is enabled in Stratix IV devices.
(5) The PORSEL pin setting delays the POR sequence for both HardCopy IV and Stratix IV devices.
(6) The INIT_DONE settings option is mask-programmed into the device. You must submit these settings to Altera with the final design prior to
mapping to a HardCopy IV device. The use of the INIT_DONE option and other dual-purpose pins (for example, DEV_CLRn device-wide reset
and DEV_OE device-wide output enable) are available in the Fitter Device Options section of the Quartus II report file.
© January 2010 Altera Corporation
HardCopy IV Device Handbook, Volume 2