HC4GX15 Datasheet, PDF (501/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 2: HardCopy IV GX Dynamic Reconfiguration
2–43
Offset Cancellation Control for Receiver Channels
Table 2–20. Connecting reconfig_fromgxb and reconfig_togxb for PMA-Only Channels (Part 2 of 2)
ALTGX Setting and Instances
ALTGX_RECONFIG Settings and Instance
What is the number of
channels? option in
the General screen
What is the starting
channel number?
option in the Reconfig
screen
1
(PMA-only channels)
Set this option to 0.
The logical channel
address of the first
channel is 0.
5
(PMA-only channels)
Set this option to 4.
The logical channel
addresses of the first
to fifth channels are 4,
8, 12, 16, and 20,
respectively.
What is the number of
channels controlled
by the reconfig
controller? option in
the Reconfiguration
settings screen
■ Determine the
highest logical
channel address
(20).
■ Round it up to the
next multiple of 4.
■ Set this option to 24
reconfig_
fromgxb1 and
reconfig_
fromgxb2
outputs
reconfig_
fromgxb1 is 17 bits
wide
(1 * 17)
reconfig_
fromgxb2 is 85 bits
wide
(5 * 17)
reconfig_
fromgxb input
reconfig_
fromgxb is 102 bits
wide
(6 * 17, 24 channels
can logically fit into 6
transceiver blocks)
1 You must connect the reconfig_fromgxb input port of the ALTGX_RECONFIG
instance to both the reconfig_fromgxb1 output port of ALTGX instance 1 and the
reconfig_fromgxb2 output port of ALTGX instance 2, as follows:
reconfig_fromgxb[101:0] = {reconfig_fromgxb2[84:0],
reconfig_fromgxb1[16:0]}
The lowest What is the starting channel number? option transceiver block is
connected to the lowest significant bit, and so on.
The reconfig_fromgxb1 of ALTGX instance 1 must be connected to
reconfig_fromgxb[16:0] of the ALTGX_RECONFIG instance.
Similarly, reconfig_fromgxb2 of ALTGX instance 2 must be connected to
reconfig_fromgxb[101:17] of the ALTGX_RECONFIG instance.
1 The reconfig_togxb output of ALTGX_RECONFIG instance 1 is fixed to 3 bits and
must be connected to the same reconfig_togxb ports of both the ALTGX instances.
Offset Cancellation Control for Receiver Channels
As the silicon progresses toward smaller process nodes, the performance of circuits at
these smaller nodes depends more on process variations. These process variations
result in analog voltages being offset from required ranges. The HardCopy IV GX
device provides an offset cancellation circuit per receiver channel to counter offset
variations due to process, voltage, and temperature. The offset cancellation logic
corrects these offsets. The receiver buffer and receiver clock data recovery require
offset cancellation.
© June 2009 Altera Corporation
HardCopy IV Device Handbook, Volume 3