HC4GX15 Datasheet, PDF (354/668 Pages) Altera Corporation – HardCopy IV Device Handbook

1–90
Chapter 1: HardCopy IV GX Transceiver Architecture
Receiver Channel Datapath
Figure 1–67 shows the receiver bit reversal feature in Basic double-width 20-bit wide
datapath configurations.
Figure 1–67. Receiver Bit Reversal in Double-Width Mode
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rx_revbitordwa = high
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To Serializer
Output of Word Aligner
before RX bit reversal
Output of Word Aligner
after RX bit reversal
Receiver Byte Reversal in Basic Double-Width Modes
The MSByte and LSByte of the input data to the transmitter may be erroneously
swapped. The receiver byte reversal feature is available to correct this situation.
An optional port, rx_revbyteordwa, is available only in Basic double-width mode
to enable receiver byte reversal. In 8B/10B enabled mode, a high value on
rx_revbyteordwa exchanges the 10-bit MSByte for the LSByte of the 20-bit word at
the output of the word aligner in the receiver datapath. In non-8B/10B enabled mode,
a high value on rx_revbyteordwa exchanges the 8-bit MSByte for the LSByte of the
16-bit word at the output of the word aligner in the receiver datapath. This
compensates for the erroneous exchanging at the transmitter and corrects the data
received by the downstream systems. rx_revbyteorderwa is a dynamic signal and
can cause an initial disparity error at the receiver of an 8B/10B encoded link. The
downstream system must be able to tolerate this disparity error.
HardCopy IV Device Handbook Volume 3
© June 2009 Altera Corporation