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HC4GX15 Datasheet, PDF (238/668 Pages) Altera Corporation – HardCopy IV Device Handbook
4–4
Chapter 4: Matching Stratix IV Power and Configuration Requirements with HardCopy IV Devices
HardCopy IV Power-Up Options
Figure 4–2 shows an alternative to the power-up waveform shown in Figure 4–1. The
nCONFIG pin is externally held low longer than the PORSEL delay. This delays the
initialization sequence by a small amount.
In addition, Figure 4–2 shows an Instant On power-up waveform where nCONFIG is
momentarily held low and nSTATUS and CONF_DONE are driven high externally.
Figure 4–2. Timing Waveform for Instant On Option Where nCONFIG is Held Low After Power-Up
Vcc (ALL)
nCONFIG
nSTATUS "don't care"
CONF_DONE "don't care"
User I/O "don't care"
High-Z
INIT_DONE "don't care"
tPOR or Longer
tCF2ST1
tADD
tCD
tUM
User Mode
Notes to Figure 4–2:
(1) This waveform applies if nCONFIG is held low longer than tPOR delay.
(2) VCC (ALL) represents either all the power pins or the last power pin powered up to specified operating conditions. All HardCopy IV power pins
must be powered within specifications.
(3) The nCONFIG, nSTATUS, and CONF_DONE pins are weakly pulled high by an external 10 K ohm resistor to VCCPGM; they must be high for this
waveform to apply.
(4) User I/O pins may be tri-stated or driven before and during power-up.
(5) INIT_DONE is an optional pin that can be enabled on the FPGA using the Quartus II software. HardCopy IV devices carry over the INIT_DONE
functionality from the prototype FPGA design.
(6) The nCEO pin is asserted at approximately the same time as the CONF_DONE pin is released. However, the nCE pin must be driven low externally
for this waveform to apply. Pulsing the nCONFIG signal on an FPGA re-initializes the configuration sequence. The nCONFIG signal on a
HardCopy IV device also restarts the initialization sequence.
Pulsing the nCONFIG signal on an FPGA re-initializes the configuration sequence.
This feature is the same for HardCopy ASIC devices; pulse the nCONFIG signal on a
HardCopy ASIC device to restart the POR sequence.
Figure 4–3 shows the instant-on behavior of the configuration signals and user I/O
pins if the nCONFIG pin is pulsed while the VCC supplies are already powered up and
stable.
HardCopy IV Device Handbook, Volume 2
© June 2009 Altera Corporation