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HC4GX15 Datasheet, PDF (585/668 Pages) Altera Corporation – HardCopy IV Device Handbook | |||
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Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Design Examples: Dynamic Reconfiguration Controller (ALTGX_RECONFIG)
2â127
Example 4: Data Rate Division in TX Mode
This design example explains the steps to dynamically divide the transmit data rate of
a transceiver channel by 4, 2, or 1 without requiring .mif generation.
The design contains the following two instances:
â ALTGX instance 1âTwo regular transceiver channels configured in Basic
functional mode with 8B/10B enabled and running at 4.25 Gbps data rate. You can
reconfigure the mode dynamically between 4.25 Gbps, 2.125 Gbps, and
1062.5 Mbps.
â ALTGX_RECONFIG instance 1âA single dynamic reconfiguration controller
connected to ALTGX instance 1.
Use the following steps to dynamically reconfigure the transmit data rate of the
transceiver channel:
1. Create a Basic functional mode by setting the operation mode to Receiver and
Transmitter configuration and the What is the number of channels? option to 2.
2. Set up the options shown in Table 2â35 for both the ALTGX and
ALTGX_RECONFIG MegaWizard Plug-In Managers.
Table 2â35. Data Rate Division in TX Dynamic Reconfiguration Mode for Example 4 (Part 1 of 3)
ALTGX Settings and Instances
ALTGX_RECONFIG Settings and Instance
ALTGX Setting
What is the deserializer
block width? option
What is the channel width?
option
ALTGX Instance 1
(Basic Functional Mode,
Receiver and Transmitter
Operation Mode)
ALTGX_RECONFIG Setting
ALTGX_RECONFIG
Instance 1
Select double-width mode.
This is required because the
highest data rate in this
example is 4.25 Gbps
(single-width mode can be
selected only up to
3.750 Gbps).
What is the number of
channels controlled by the
reconfig controller? option
in the Reconfiguration
settings screen
For more information about
this setting, refer to âTotal
Number of Channels
Controlled by the
ALTGX_RECONFIG Instanceâ
on page 2â35.
â Determine the highest
logical channel address
(1).
â Round it up to the next
multiple of 4.
â Set this option to 4.
â You can set the channel
width to 16 or 32.
â The lowest core fabric
frequency allowed in the
Quartus II software is
25 MHz. Therefore, the
transceiver runs at 1062.5
Mbps with a 32-bit core
fabric-Transceiver
interface. The core fabric
clock frequency in this
case is 26.5 MHz
(1062.5/40 = 26.5625).
Data Rate Division in TX
option in the
Reconfiguration Settings
screen
â Enable this option.
â This creates the
rate_switch_ctrl
[1:0] input signal.
â Refer to Table 2â24 to set
a value at the
rate_switch_ctrl
[1:0] port.
© June 2009 Altera Corporation
HardCopy IV Device Handbook, Volume 3
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