HC4GX15 Datasheet, PDF (60/668 Pages) Altera Corporation – HardCopy IV Device Handbook

6–10
Chapter 6: HardCopy IV Device I/O Features
HardCopy IV I/O Structure
HardCopy IV I/O Structure
The I/O element (IOE) in HardCopy IV devices contains a bidirectional I/O buffer
and I/O registers to support a complete embedded bidirectional single data rate or
DDR transfer. Figure 6–1 shows that certain I/O banks support certain I/O standards.
The IOEs are located in I/O blocks around the periphery of the HardCopy IV device.
The HardCopy IV bidirectional IOE also supports features such as:
■ MultiVolt I/O interface
■ Dedicated circuitry for external memory interface
■ Input delay
■ Four output-current strength settings for single-ended I/Os
■ Four slew rate settings for both single-ended and differential I/Os
■ Four output delay settings for single-ended I/Os
■ Six I/O delay settings for single-ended I/Os
■ Optional bus-hold
■ Optional pull-up resistor
■ Optional open-drain output
■ Optional on-chip series termination with or without calibration
■ Optional on-chip parallel termination with calibration
■ Optional on-chip differential termination
■ Optional PCI clamping diode
MultiVolt I/O Interface
The HardCopy IV architecture supports the MultiVolt I/O interface feature that
allows HardCopy IV devices in all packages to interface with systems of different
supply voltages.
The V_CCIO pins can be connected to a 1.2-, 1.5-, 1.8-, 2.5-, or 3.0-V power supply,
depending on the output requirements. The output levels are compatible with
systems of the same voltage as the power supply. (For example, when V_CCIO pins are
connected to a 1.5-V power supply, the output levels are compatible with 1.5-V
systems).
The HardCopy IV V_CCPD power pins must be connected to a 2.5-, or 3.0-V power
supply. Using these power pins to supply the pre-driver power to the output buffers
increases the performance of the output pins. Table 6–5 summarizes HardCopy IV
MultiVolt I/O support.
Table 6–5. HardCopy IV MultiVolt I/O Support (Part 1 of 2) (Note 1)
Input Signal (V)
Output Signal (V)
V_CCIO (V)
1.2 1.5 1.8 2.5 3.0 3.3 1.2 1.5 1.8 2.5 3.0 3.3
1.2
v
—
—
—
—
—
v
—
—
—
—
—
1.5
—
v v(2) —
—
—
—
v
—
—
—
—
HardCopy IV Device Handbook, Volume 1
© January 2010 Altera Corporation