HC4GX15 Datasheet, PDF (210/668 Pages) Altera Corporation – HardCopy IV Device Handbook

3–8
Chapter 3: Mapping Stratix IV Device Resources to HardCopy IV Devices
Summary of Differences Between HardCopy IV and Stratix IV Devices
Table 3–6. HardCopy IV E and Stratix IV E Package and I/O Pin Count Mapping (Part 2 of 2)
HardCopy IV E
ASIC (1)
Stratix IV E
FPGA
Prototype
484-Pin
780-Pin FineLine
1152-Pin
1517-Pin
1760-Pin
FineLine BGA (2)
BGA (2)
FineLine BGA (2) FineLine BGA (3) FineLine BGA
EP4SE360
—
—
744
—
—
HC4E35F
EP4SE530
—
—
744
880
—
EP4SE820
—
—
744
880
—
Notes to Table 3–6:
(1) The last letter in the HardCopy IV E device name refers to the following package types: F–Performance-optimized flip-chip package,
L-Cost-optimized flip-chip package, W–Low-cost wirebond package.
(2) All I/O pin counts include eight dedicated clock inputs (CLK1p, CLK1n, CLK3p, CLK3n, CLK8p, CLK8n, CLK10p, and CLK10n) that can be used
for data inputs.
(3) All I/O pin counts include eight dedicated clock inputs (CLK1p, CLK1n, CLK3p, CLK3n, CLK8p, CLK8n, CLK10p, and CLK10n) and eight
dedicated corner PLL clock inputs (PLL_L1_CLKp, PLL_L1_CLKn, PLL_L4_CLKp, PLL_L4_CLKn, PLL_R4_CLKp, PLL_R4_CLKn,
PLL_R1_CLKp, and PLL_R1_CLKn) that can be used as data inputs.
(4) This mapping is a non-socket replacement path and requires a different board design for the Stratix IV E device and the HardCopy IV E device.
The Stratix IV E device is in a 780-Pin FineLine BGA package while the HardCopy IV E device is in a 484-Pin FineLine BGA package.
Summary of Differences Between HardCopy IV and Stratix IV Devices
HardCopy IV ASICs are functionally equivalent to Stratix IV FPGAs, but they have
architectural differences. When implementing your design and laying out your board,
consider the differences to ensure successful design mapping from the Stratix IV
FPGA to the HardCopy IV ASIC.
Architectural differences between the Stratix IV FPGA and the HardCopy IV ASIC
include:
■ HardCopy IV devices have up to 20 I/O banks and 880 I/O pins, while the largest
Stratix IV companion devices have up to 24 I/O banks and 976 I/O pins in the
1517-pin FBGA package.
■ The number of global and regional clocks is identical for Stratix IV and
HardCopy IV devices, but Stratix IV devices have up to 116 peripheral clocks,
while HardCopy IV devices have up to 88. The Quartus II software limits the clock
availability on Stratix IV and HardCopy IV companion pairs to ensure device
compatibility.
■ Configuration is not required for HardCopy IV devices; therefore, these Stratix IV
features are not supported:
■ Programming modes and features such as remote update and Programmer
Object File (.pof) encryption.
■ Cyclical redundancy check (CRC) for configuration error detection.
■ 256-bit (AES) volatile and non-volatile security key to protect designs.
■ JTAG instructions used for configuration.
■ FPGA configuration emulation mode is not supported.
■ Boundary scan (BSCAN) chain length is different and varies with device density.
■ Memory Initialization Files (.mif) for embedded memories used as RAM are not
supported.
HardCopy IV Device Handbook, Volume 2
© January 2010 Altera Corporation