HC4GX15 Datasheet, PDF (576/668 Pages) Altera Corporation – HardCopy IV Device Handbook

2–118
Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Description of Transceiver Channel Reconfiguration Modes
Table 2–31. Example for the Specifying the Input Reference Clocks (Part 4 of 4)
ALTGX Instances and Settings
ALTGX Setting
.mif Generation
ALTGX Instance 1
ALTGX Instance 2
■ Enable the Quartus II
settings for generating a
.mif for ALTGX instance 1
■ Enable the Quartus II
settings for generating a
.mif for ALTGX instance 2
■ For more information about
these settings, refer to
“Quartus II Settings for .mif
Generation” on page 2–70
■ For more information about
these settings, refer to
“Quartus II Settings for .mif
Generation” on page 2–70
■ Consider that the name of
the .mif generated is
ALTGX_instance1.mif
■ Consider that the name of
the .mif generated is
ALTGX_instance2.mif
Because there are two .mifs generated for this design, you must
maintain the identification numbers of the input reference clocks
in this design for both .mifs. Figure 2–54 shows the input
reference clock connections to the transceiver channels based on
what you set as the input clock source for each of the two
transmitter PLLs in the design.
HardCopy IV Device Handbook, Volume 3
© June 2009 Altera Corporation