HC4GX15 Datasheet, PDF (184/668 Pages) Altera Corporation – HardCopy IV Device Handbook

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Chapter 1: HardCopy IV Design Flow Using the Quartus II Software
Incremental Compilation
For large, high-density and high-performance designs in Stratix FPGAs and
HardCopy ASICs, use top-down incremental compilation. Top-down incremental
compilation facilitates team-based design environments, allowing designers to create
and optimize design blocks independently. Begin planning for incremental
compilation from the start of your design development. To take advantage of
incremental compilation flow, split the design along any of its hierarchical boundaries
into blocks called design partitions.
In the Quartus II software, the same procedures create design partitions in the
HardCopy ASIC and Stratix FPGA revisions.
f For more information about creating design partitions, refer to the Quartus II
Incremental Compilation for Hierarchical and Team-Based Design chapter in volume 1 of
the Quartus II Handbook.
In the Quartus II software, the full Incremental Compilation option is turned on by
default, so the project is ready for you to create design partitions for incremental
compilation. Figure 1–7 shows the full Incremental Compilation option in the
Quartus II software.
Figure 1–7. Quartus II Incremental Compilation Option
1 If you do not create design partitions in a design, the Quartus II software uses a flat
compilation flow, and you cannot use Incremental Compilation.
HardCopy IV Device Handbook, Volume 2
© January 2010 Altera Corporation