HC4GX15 Datasheet, PDF (597/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Error Indication in the ALTGX_RECONFIG MegaWizard Plug-In Manager
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Section IV—Reset Control Logic
The reset control sequence for channel reconfiguration must be followed during and
after the channel configuration process. In addition, when resetting the transceiver
channel, the reset control logic needs to reset the data path in the core fabric to clear
the error data received during the reconfiguration process.
f For more information, refer to the Reset Control and Power Down chapter in volume 2 in
the Stratix IV Device Handbook.
1 For a PMA controls only configuration (for example, changing the VOD, equalization,
DC gain, or pre-emphasis), the transceiver channel or the datapath in the core fabric
does not require a reset after reconfiguration. Reset is required only for channel
reconfiguration or rate switch.
Simulation
To simulate channel reconfiguration, some simulation tools only allow .ram or
Hexadecimal (Intel-Format) file (.hex) files to initialize the memory. To convert the
generated .mif to a .hex file, open the .mif in the Quartus II software and save it as a
.hex file. Initialize the memory elements with the .hex file to simulate the design.
Error Indication in the ALTGX_RECONFIG MegaWizard Plug-In Manager
The ALTGX_RECONFIG MegaWizard Plug-In Manager provides an error status
signal when you select the Enable illegal mode checking option or the Enable self
recovery option in the Error checks/data rate switch screen. The conditions under
which the error signal is asserted are:
■ Enable illegal mode checking option—When you select this option, the dynamic
reconfiguration controller checks whether an attempted operation falls under one
of the conditions listed below. The dynamic reconfiguration controller detects
these conditions within two reconfig_clk cycles, de-asserts the busy signal,
and asserts the error signal for two reconfig_clk cycles.
■ PMA controls, read operation—None of the output ports (rx_eqctrl_out,
rx_eqdcgain_out, tx_vodctrl_out, tx_preemp_0t_out,
tx_preemp_1t_out, and tx_preemp_2t_out) are selected in the
ALTGX_RECONFIG instance. The read signal is asserted.
■ PMA controls, write operation—None of the input ports (rx_eqctrl,
rx_eqdcgain, tx_vodctrl, tx_preemp_0t, tx_preemp_1t, and
tx_preemp_2t) are selected in the ALTGX_RECONFIG instance. The
write_all signal is asserted.
■ Enable self recovery option—When you select this option, the controller
automatically recovers if the operation did not complete within the expected time.
The error signal is driven high whenever the controller performs a self recovery.
■ TX Data Rate Switch using Local Divider-read operation option—The read
transaction is valid only for the following two dynamic reconfiguration modes:
■ PMA controls reconfiguration mode
■ TX Data Rate switch using Local Divider mode
© June 2009 Altera Corporation
HardCopy IV Device Handbook, Volume 3