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HC4GX15 Datasheet, PDF (594/668 Pages) Altera Corporation – HardCopy IV Device Handbook
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Chapter 2: HardCopy IV GX Dynamic Reconfiguration
Design Examples: Dynamic Reconfiguration Controller
Step 2—Create the ALTGX_RECONFIG Instance for the GIGE Configuration
1. Set the What is number of channels controlled by the reconfig controller? option
to 1.
2. Select Analog controls to modify the PMA values, if desired.
3. Select the Channel reconfiguration with TX PLL select/reconfig option. This
selection is required to perform a channel reconfiguration.
4. Select the required signals under the write control and read control options, if the
Analog controls option in screen 1 is selected.
1 Refer to the ALTGX_RECONFIG Megafunction User Guide chapter in
volume 3 of the HardCopy IV Device Handbook for information about write
control and read control signals.
5. Complete the ALTGX_RECONFIG MegaWizard Plug-In Manager instantiation.
Step 3—Create a Top-Level Design and Generate the .mif for the GIGE Configuration
Clock input connections for the ALTGX instance are listed below. The clock source
needs to be feed the following clock inputs:
■ GIGE configuration—pll_inclk and rx_cruclk inputs.
■ SONET/SDH OC48 configuration—pll_inclk_alt and rx_cruclk_alt
inputs.
1. Because GIGE is the protocol mode you selected in the first page of the ALTGX
MegaWizard Plug-In Manager, the Quartus II software requires the GIGE clock
source to be connected to the pll_inclk and rx_cruclk inputs.
2. Connect the cal_blk_clk input of the ALTGX instance to a clock source.
1 For the cal_blk_clk signal requirements, refer to the Transceiver Port
List in the HardCopy IV GX Transceiver Architecture chapter in volume 3 of
the HardCopy IV Device Handbook.
3. Connect the tx_dataout and rx_datain ports to the top-level module. This is
required for the Quartus II software to compile successfully. To generate the .mif,
connecting the other input and output ports of the ALTGX instance is not
mandatory.
4. Assign pins for the clock ports (pll_inclk, rx_cruclk, pll_inclk_alt,
and rx_cruclk_alt). If pin assignments are not made for the tx_dataout and
rx_datain ports of the ALTGX instance, the Quartus II software automatically
selects pins for these ports and names the .mif with the instance name. The .mif
can still be used by any physical transceiver channel to perform reconfiguration.
After compilation of the design, the Quartus II software creates the .mif in the
reconfig_mif folder under the project directory. Copy the .mif and save it in a separate
folder. Otherwise, the new .mif that is generated for the SONET/SDH configuration
will overwrite the current .mif.
HardCopy IV Device Handbook, Volume 3
© June 2009 Altera Corporation