HC4GX15 Datasheet, PDF (281/668 Pages) Altera Corporation – HardCopy IV Device Handbook

Chapter 1: HardCopy IV GX Transceiver Architecture
Transceiver Port List
Table 1–2. HardCopy IV GX ALTGX Megafunction Ports (Part 10 of 14)
Port Name
8B/10B Encoder
tx_ctrlenable
tx_forcedisp
tx_dispval
Input/Output
Description
Input
Input
Input
8B/10B encoder /Kx.y/ or /Dx.y/ control.
When asserted high, the 8B/10B encoder
encodes the data on the tx_datain port as a
/Kx.y/ control code group. When de-asserted
low, it encodes the data on the tx_datain
port as a /Dx.y/ data code group. The width of
this signal depends on the following channel
width:
Channel Width tx_ctrlenable
8
1
16
2
32
4
8B/10B encoder force disparity control. When
asserted high, it forces the 8B/10B encoder to
encode the data on the tx_datain port with
a positive or negative disparity depending on
the tx_dispval signal level. When
de-asserted low, the 8B/10B encoder encodes
the data on the tx_datain port according to
the 8B/10B running disparity rules. The width of
this signal depends on the following channel
width:
Channel Width tx_forcedisp
8
1
16
2
32
4
8B/10B encoder force disparity value. A high
level on the tx_dispval signal when the
tx_forcedisp signal is asserted high
forces the 8B/10B encoder to encode the data
on the tx_datain port with a negative
starting running disparity. A low level on the
tx_dispval signal when the
tx_forcedisp signal is asserted high
forces the 8B/10B encoder to encode the data
on the tx_datain port with a positive
starting running disparity. The width of this
signal depends on the following channel width:
Channel Width tx_dispval
8
1
16
2
32
4
1–17
Scope
Channel
Channel
Channel
© June 2009 Altera Corporation
HardCopy IV Device Handbook Volume 3